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by Giovanni
Sun Jan 24, 2021 6:44 am
Forum: ChibiOS/RT
Topic: ChibiOS OS Library Test Suite
Replies: 18
Views: 648

Re: ChibiOS OS Library Test Suite

Hi Bob, chFactoryGetObjectsFIFO() cannot return NULL so it is not necessary to test it. The two chFifoTakeObjectTimeout() should fail because the FIFO is empty. IMO the test is not very useful because the allocator always returns block aligned, at least, to PORT_NATURAL_ALIGN so it would never fail....
by Giovanni
Sat Jan 23, 2021 9:49 pm
Forum: Development and Feedback
Topic: STM32WB55 support
Replies: 84
Views: 6643

Re: STM32WB55 support

I added the missing files.

Giovanni
by Giovanni
Sat Jan 23, 2021 12:28 pm
Forum: ChibiOS/RT
Topic: ChibiOS OS Library Test Suite
Replies: 18
Views: 648

Re: ChibiOS OS Library Test Suite

I committed a tentative fix in trunk, will be backported after some review.

Giovanni
by Giovanni
Sat Jan 23, 2021 11:46 am
Forum: ChibiOS/RT
Topic: ChibiOS OS Library Test Suite
Replies: 18
Views: 648

Re: ChibiOS OS Library Test Suite

That would be a good idea.

Giovanni
by Giovanni
Sat Jan 23, 2021 11:20 am
Forum: ChibiOS/RT
Topic: ChibiOS OS Library Test Suite
Replies: 18
Views: 648

Re: ChibiOS OS Library Test Suite

Hi Bob,

The fix is not sufficient, it would align the size of the objects but the base address would not be necessarily aligned too, dyn_create_object_heap() requires an alignment parameter and should use chHeapAllocAligned() internally.

I am looking into it.

Giovanni
by Giovanni
Sat Jan 23, 2021 8:52 am
Forum: Development and Feedback
Topic: STM32WB55 support
Replies: 84
Views: 6643

Re: STM32WB55 support

Hi,

I applied the latest patches.

Giovanni
by Giovanni
Fri Jan 22, 2021 3:03 pm
Forum: STM32 Support
Topic: Where to start STM32H7 support
Replies: 201
Views: 32772

Re: Where to start STM32H7 support

Threads are not affected by the cache, all threads go through the cache in the same way, the problem is coherence with other bus masters such as DMAs that don't go through the cache, there is no HW cache coherence mechanism in Cortex-M. ChibiOS critical sections provide implicitly a memory barrier, ...
by Giovanni
Fri Jan 22, 2021 1:41 pm
Forum: STM32 Support
Topic: Where to start STM32H7 support
Replies: 201
Views: 32772

Re: Where to start STM32H7 support

On F7 DTCM is accessible by DMAs, this is not the case on the H7. F7 is generally much easier to use.

Is the gcc volatile keyword observed correctly for data located in cachable memory?


No, the compiler is not cache-aware.

Giovanni
by Giovanni
Fri Jan 22, 2021 11:39 am
Forum: STM32 Support
Topic: Where to start STM32H7 support
Replies: 201
Views: 32772

Re: Where to start STM32H7 support

You can make any combination of the two settings, you could also add extra regions if you want.

Giovanni
by Giovanni
Fri Jan 22, 2021 10:24 am
Forum: STM32 Support
Topic: Where to start STM32H7 support
Replies: 201
Views: 32772

Re: Where to start STM32H7 support

It is not an LLD, it is under /os/hal/ports/common/ARMCMx.

Giovanni

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