[DEV] RP2040 support

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Re: [DEV] RP2040 support

Postby Giovanni » Mon Mar 22, 2021 10:18 am

Just found something problematic, GPIOs can only be manipulated individually but there are no "ports". This means that the PAL driver will not be able to implement "port" and "bus" functions which require manipulating groups of pads atomically.

They have a very flexible GPIO but missed this simple detail.

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Re: [DEV] RP2040 support

Postby Giovanni » Tue Mar 23, 2021 8:20 am

Small update, I wrapped the SDK clock initialization code into our HAL and it is working, perhaps it is better to leave it this way. Now there is an /os/various/pico_bindings directory with what is needed for integration.

About the SDK, code quality is not bad but certainly it does not make integration easy and there are things I don't like very much. For example:

1) Totally reliant on its build system, for example the file "version.h" is generated during build. If you plan to use an IDE or another build system then you are out of luck. The build system itself is "sparse", there are build files everywhere in the tree and it is not clear what each project includes.

2) There are multiple header files with the same name, "clocks.h" for example but most headers have duplications.

3) No namespaces for files, names are very generic licke "clocks.h", "adc.h" etc, expect collisions.

4) It includes files by path because name collisions so you see: #include "hardware/clocks.h", I always considered this a bad practice.

5) It puts a single file in each directory, one .c per directory, one .h per directory. You have to specify dozens of paths in compiler search paths because this.

6) No CMSIS support because it is known that ARM core users don't want to use ARM libraries... lets make dozens registers/structs header files instead of a single standard device file. I added some basic CMSIS support for this device.

Maybe I am being a bit salty but I expected much better than the usual vendor libraries, it is just a little better :-) at least the code is NOT bad.

About the micro, another thing that bothers me is the lack of a "circular more" and "half transfer" interrupt in DMA channels, if you need to implement a double buffer scheme like our ADC/DAC/I2S/SPI drivers then you need to use two channels linking each other, on the other hand it has a nice "ring" mode for circular buffers and this nice linking mechanism.

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Re: [DEV] RP2040 support

Postby Giovanni » Wed Mar 24, 2021 3:22 pm

Working on the SIO driver, the ARM UART does not support a "transmit complete" interrupt so that functionality will not be implemented. The large FIFOs will make a serial driver not necessary on this device.

This is only bad if you need to work on half duplex lines like RS485, not a so common use case.

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Re: [DEV] RP2040 support

Postby FXCoder » Wed Mar 24, 2021 10:35 pm

Hi,
For half duplex protocols the setting of FIFO size = 1 could be a workaround that might be used if required?
--
Bob

Code: Select all

4.2.6.3. UARTTXINTR
The transmit interrupt changes state when one of the following events occurs:
• If the FIFOs are enabled and the transmit FIFO is equal to or lower than the programmed trigger level then the
transmit interrupt is asserted HIGH. The transmit interrupt is cleared by writing data to the transmit FIFO until it
becomes greater than the trigger level, or by clearing the interrupt.
• If the FIFOs are disabled (have a depth of one location) and there is no data present in the transmitters single
location, the transmit interrupt is asserted HIGH. It is cleared by performing a single write to the transmit FIFO, or
by clearing the interrupt.
To update the transmit FIFO you must:
• Write data to the transmit FIFO, either prior to enabling the UART and the interrupts, or after enabling the UART and
interrupts.

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Re: [DEV] RP2040 support

Postby Giovanni » Thu Mar 25, 2021 6:59 am

It does not help disabling the FIFO, it is just a FIFO with depth one, there could still be one frame being transmitted in the shift register.

A better workaround could be to use a PIO in those scenarios, it can emulate an UART, there are examples.

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Re: [DEV] RP2040 support

Postby FXCoder » Thu Mar 25, 2021 11:05 am

OK.
I was thinking along the lines of starting a timer at the FIFO interrupt which would have a timeout calculated as 1 character interval.
If new data is added to FIFO then the timer gets cancelled else it would t/o and become transmit complete event.

Anyway PIO (soft) UART would also meet the brief.
--
Bob

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Re: [DEV] RP2040 support

Postby Giovanni » Thu Mar 25, 2021 11:39 am

FXCoder wrote:OK.
I was thinking along the lines of starting a timer at the FIFO interrupt which would have a timeout calculated as 1 character interval.
If new data is added to FIFO then the timer gets cancelled else it would t/o and become transmit complete event.

Anyway PIO (soft) UART would also meet the brief.
--
Bob


In the past I had this problem with implementing an RS485 half duplex connection. I resolved by looping back TX in RX so I could determine when the last character was transmitted by receiving it then performing the transceiver switch however that required some HW tricks.

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Re: [DEV] RP2040 support

Postby Giovanni » Sat Mar 27, 2021 6:40 pm

The SIO (UART) driver is almost ready but I also need PAL before being able to try it.

Resolved the GPIO mystery, port-wide registers are in "SIO" registers not in the GPIO blocks where I was looking.

This means that to manipulate GPIO (in the PAL driver) you need 3 different sets of registers: SIO, IO_BANK0, PADS_BANK0.

I have not found explicit settings for an "open drain" mode, that could be missing but there is an "output enable" feature that could do the same thing with some tricks.

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Re: [DEV] RP2040 support

Postby Giovanni » Sun Mar 28, 2021 7:15 pm

OK, spent some time finding bugs in the SIO driver now it appears to work, this is the first report, not bad for an M0:

Code: Select all


ch> test rt

*** ChibiOS/RT Test Suite
***
*** Compiled:     Mar 28 2021 - 20:17:05
*** Platform:     RP2040
*** Test Board:   Raspberry Pi Pico
***
*** Text size:    60680 bytes
*** RO data size: 12088 bytes
*** Data size:    2692 bytes
*** BSS size:     4852 bytes

============================================================================
=== Test Sequence 1 (Information)
----------------------------------------------------------------------------
--- Test Case 1.1 (Port Info)
--- Architecture:                       ARMv6-M
--- Core Variant:                       Cortex-M0+
--- Compiler:                           GCC 10.2.1 20201103 (release)
--- Port Info:                          Preemption through NMI
--- Natural alignment:                  4
--- Stack alignment:                    8
--- Working area alignment:             8
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.2 (Kernel Info)
--- Product:                            ChibiOS/RT
--- Stable Flag:                        0
--- Version String:                     6.2.0
--- Major Number:                       6
--- Minor Number:                       2
--- Patch Number:                       0
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.3 (Kernel Settings)
--- CH_CFG_ST_RESOLUTION:               32
--- CH_CFG_ST_FREQUENCY:                1000
--- CH_CFG_INTERVALS_SIZE:              32
--- CH_CFG_TIME_TYPES_SIZE:             32
--- CH_CFG_ST_TIMEDELTA:                0
--- CH_CFG_TIME_QUANTUM:                0
--- CH_CFG_MEMCORE_SIZE:                0
--- CH_CFG_NO_IDLE_THREAD:              0
--- CH_CFG_OPTIMIZE_SPEED:              1
--- CH_CFG_USE_TM:                      0
--- CH_CFG_USE_REGISTRY:                1
--- CH_CFG_USE_WAITEXIT:                1
--- CH_CFG_USE_SEMAPHORES:              1
--- CH_CFG_USE_SEMAPHORES_PRIORITY:     0
--- CH_CFG_USE_MUTEXES:                 1
--- CH_CFG_USE_MUTEXES_RECURSIVE:       0
--- CH_CFG_USE_CONDVARS:                1
--- CH_CFG_USE_CONDVARS_TIMEOUT:        1
--- CH_CFG_USE_EVENTS:                  1
--- CH_CFG_USE_EVENTS_TIMEOUT:          1
--- CH_CFG_USE_MESSAGES:                1
--- CH_CFG_USE_MESSAGES_PRIORITY:       0
--- CH_CFG_USE_DYNAMIC:                 1
--- CH_DBG_STATISTICS:                  0
--- CH_DBG_SYSTEM_STATE_CHECK:          0
--- CH_DBG_ENABLE_CHECKS:               0
--- CH_DBG_ENABLE_ASSERTS:              0
--- CH_DBG_TRACE_MASK:                  255
--- CH_DBG_TRACE_BUFFER_SIZE:           128
--- CH_DBG_ENABLE_STACK_CHECK:          0
--- CH_DBG_FILL_THREADS:                0
--- CH_DBG_THREADS_PROFILING:           0
--- Result: SUCCESS
============================================================================
=== Test Sequence 2 (System layer and port interface)
----------------------------------------------------------------------------
--- Test Case 2.1 (System integrity functionality)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.2 (Critical zones functionality)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.3 (Interrupts handling functionality)
--- Result: SUCCESS
============================================================================
=== Test Sequence 3 (Time and Intervals Functionality)
----------------------------------------------------------------------------
--- Test Case 3.1 (System Tick Counter functionality)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.2 (Time ranges functionality)
--- Result: SUCCESS
============================================================================
=== Test Sequence 4 (Time Stamps Functionality)
----------------------------------------------------------------------------
--- Test Case 4.1 (Time Stamps functionality)
--- Result: SUCCESS
============================================================================
=== Test Sequence 5 (Threads Functionality)
----------------------------------------------------------------------------
--- Test Case 5.1 (Thread Sleep functionality)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 5.2 (Ready List functionality, threads priority order)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 5.3 (Priority change test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 5.4 (Priority change test with Priority Inheritance)
--- Result: SUCCESS
============================================================================
=== Test Sequence 6 (Suspend/Resume)
----------------------------------------------------------------------------
--- Test Case 6.1 (Suspend and Resume functionality)
--- Result: SUCCESS
============================================================================
=== Test Sequence 7 (Counter Semaphores)
----------------------------------------------------------------------------
--- Test Case 7.1 (Semaphore primitives, no state change)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 7.2 (Semaphore enqueuing test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 7.3 (Semaphore timeout test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 7.4 (Testing chSemAddCounterI() functionality)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 7.5 (Testing chSemWaitSignal() functionality)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 7.6 (Testing Binary Semaphores special case)
--- Result: SUCCESS
============================================================================
=== Test Sequence 8 (Mutexes, Condition Variables and Priority Inheritance)
----------------------------------------------------------------------------
--- Test Case 8.1 (Priority enqueuing test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 8.2 (Priority return verification)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 8.3 (Repeated locks, non recursive scenario)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 8.4 (Condition Variable signal test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 8.5 (Condition Variable broadcast test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 8.6 (Condition Variable priority boost test)
--- Result: SUCCESS
============================================================================
=== Test Sequence 9 (Synchronous Messages)
----------------------------------------------------------------------------
--- Test Case 9.1 (Messages Server loop)
--- Result: SUCCESS
============================================================================
=== Test Sequence 10 (Event Sources and Event Flags)
----------------------------------------------------------------------------
--- Test Case 10.1 (Events registration)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.2 (Event Flags dispatching)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.3 (Events Flags wait using chEvtWaitOne())
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.4 (Events Flags wait using chEvtWaitAny())
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.5 (Events Flags wait using chEvtWaitAll())
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.6 (Events Flags wait timeouts)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.7 (Broadcasting using chEvtBroadcast())
--- Result: SUCCESS
============================================================================
=== Test Sequence 11 (Dynamic threads)
----------------------------------------------------------------------------
--- Test Case 11.1 (Threads creation from Memory Heap)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.2 (Threads creation from Memory Pool)
--- Result: SUCCESS
============================================================================
=== Test Sequence 12 (Benchmarks)
----------------------------------------------------------------------------
--- Test Case 12.1 (Messages performance #1)
--- Score : 575437 msgs/S, 1150874 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.2 (Messages performance #2)
--- Score : 499478 msgs/S, 998956 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.3 (Messages performance #3)
--- Score : 499478 msgs/S, 998956 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.4 (Context Switch performance)
--- Score : 1499944 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.5 (Threads performance, full cycle)
--- Score : 296590 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.6 (Threads performance, create/exit only)
--- Score : 367269 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.7 (Mass reschedule performance)
--- Score : 161959 reschedules/S, 971754 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.8 (Round-Robin voluntary reschedule)
--- Score : 935300 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.9 (Virtual Timers set/reset performance)
--- Score : 2021750 timers/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.10 (Semaphores wait/signal performance)
--- Score : 6017784 wait+signal/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.11 (Mutexes lock/unlock performance)
--- Score : 1504452 lock+unlock/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.12 (RAM Footprint)
--- OS    : 120 bytes
--- Thread: 68 bytes
--- Timer : 20 bytes
--- Semaph: 12 bytes
--- Mutex : 16 bytes
--- CondV.: 8 bytes
--- EventS: 4 bytes
--- EventL: 20 bytes
--- MailB.: 40 bytes
--- Result: SUCCESS
----------------------------------------------------------------------------

Final result: SUCCESS
ch>


Next is tickless mode using the TIMER unit. It will be "interesting" because it can only operate at 1MHz resolution, never tried that on an M0.

Giovanni

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Re: [DEV] RP2040 support

Postby Giovanni » Mon Mar 29, 2021 9:49 am

Tickless working... the TIMER seems to have been designed with ChibiOS tickless mode in mind, very convenient.

I will stop on HAL for a while, I need to start thinking about dual core support, this could not be immediate. The kernel itself is ready but the other things need improvements (M0-port, ST driver, scatter files, startup files and probably more).

Giovanni


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