ChibiOS Free Embedded RTOS

Using the suggested workaround also fixes the issue for me. I am not sure about that the instruction after MSR was never critical. What if the state checker is disabled?

Anyway, thanks once again for your blazing fast support AND fix on this matter!

Cheers,
Andre

I fiddle with the exact same problem for a week now and was not able to identify the root cause.

Problem:
#SV8 after random time (5mins - 8 hours)

I print out all IRQ levels in my own chSysHalt hook, they are all below kernel level.
Furthermore, I also checked that all IRQ control paths call CH ...

Oh boy, forget about that thread. I just found the problem.

The DEBUG preprocessor definition was set for the C compiler, but not for ASM compiler. So that _dbg_check_unlock was not called in _port_switch.
Sorry for the hassle, you may close this thread.

Hi Giovanni,

I just started another fresh project with an STM32F4 and came across a rather subtle bug with the debug check functionality of _dbg_check_lock.
I am using only the RT part of the recently released ChibiOS 3.0.0, no fancy HAL stuff, periodic tick mode (pretty much v2.6 style).

In my ...

It took a while to find some time for testing, but it looks good now

The previous version crashed after 10s, the "patched" one you provided is already running for an hour by now. My CPU load measurement did not show a significant increase (<0.1%).

There you go. I inserted the code into the STM32F303-DISCOVERY demo project. I don't have that board myself, so I hope I ported everything correct.

Oh, I just recognized that the STM32F3xx firmware library is not part of ChibiOS. I use it as my HAL abstraction, because I have less porting work with it.

I am downloading ChibiStudio right now (ETA: 30mins) and will try to compile my example there, eventually adding some missing files/vectors.

Can't believe that a field-oriented motor control is an unusual project
I need those fast IRQs to reduce IRQ latency as much as possible. And if you state ChibiOS is able to use fast IRQs, I take you word for granted.

Anyway, great to hear you are working on a fix. Do you still need the compilable ...

Perfect, good to hear you are on it.

Hey Giovanni,

I finally had the time to modify my source to be hardware inpedendent. The setup is now as follows:
TIM2 + TIM4: fast IRQ, priority=2, no FPU usage
TIM1 + TIM8: fast IRQ, priority=3, uses FPU
TIM3: fast IRQ, priority=4, uses FPU
TIM7: normal IRQ, priority=12, no FPU usage, uses ...