Hi,
I committed RTCv2 and RTCv3 drivers using bypass mode, feedback appreciated.
Giovanni
Search found 14322 matches
- Tue May 30, 2023 1:42 pm
- Forum: Bug Reports
- Topic: stm32l412
- Replies: 8
- Views: 835
- Mon May 29, 2023 5:51 am
- Forum: STM32 Support
- Topic: UDP receive not working Topic is solved
- Replies: 6
- Views: 207
Re: UDP receive not working Topic is solved
Hi,
The HTTP demo is able to send and receive using TCP so I guess the integration is working.
I never used UDP with lwIP, MSG_DONTWAIT, perhaps you should wait for the message?
Giovanni
The HTTP demo is able to send and receive using TCP so I guess the integration is working.
I never used UDP with lwIP, MSG_DONTWAIT, perhaps you should wait for the message?
Giovanni
- Sun May 28, 2023 9:25 am
- Forum: Bug Reports
- Topic: STM32 USBv1: Off-by-one in NUM_BLOCK for OUT transfers of sizes >62 Bytes Topic is solved
- Replies: 6
- Views: 387
Re: STM32 USBv1: Off-by-one in NUM_BLOCK for OUT transfers of sizes >62 Bytes Topic is solved
Hi,
Can this be closed?
Giovanni
Can this be closed?
Giovanni
- Sun May 28, 2023 9:24 am
- Forum: Bug Reports
- Topic: hal_usb: Zero-Length Packets for Control IN Transfers
- Replies: 3
- Views: 226
Re: hal_usb: Zero-Length Packets for Control IN Transfers
News? If not I will close it here.
Giovanni
Giovanni
- Sun May 28, 2023 9:23 am
- Forum: Bug Reports
- Topic: stm32_lse.inc -- small bug/feature
- Replies: 2
- Views: 208
Re: stm32_lse.inc -- small bug/feature
Hi, What is the issue exactly? the behavior of LSERDY bit does not depend on LSEBYP, the RM states: "After the LSEON bit is cleared, LSERDY goes low after 6 external low-speed oscillator clock cycles." So it is just a small delay not related to actual oscillator stability, HSERDY does the ...
- Sun May 28, 2023 8:51 am
- Forum: Small Change Requests
- Topic: BaseFlash::state - use critical region to change
- Replies: 1
- Views: 330
Re: BaseFlash::state - use critical region to change
Hi,
Why acquire a lock just to read "state"? single read/write operations are atomic, no lock required.
Is there some read-modify-write to consider somewhere?
Giovanni
Why acquire a lock just to read "state"? single read/write operations are atomic, no lock required.
Is there some read-modify-write to consider somewhere?
Giovanni
- Sun May 28, 2023 8:42 am
- Forum: ChibiOS/HAL
- Topic: STM32F722/23/32/33/30 HAL EFL driver
- Replies: 8
- Views: 2047
Re: STM32F722/23/32/33/30 HAL EFL driver
Hi,
Patches don't apply, lots of details changed, the driver itself probably is fine.
Giovanni
Patches don't apply, lots of details changed, the driver itself probably is fine.
Giovanni
- Sat May 27, 2023 2:06 pm
- Forum: Bug Reports
- Topic: oslib/include/chmemchecks.h Topic is solved
- Replies: 1
- Views: 181
Re: oslib/include/chmemchecks.h Topic is solved
Hi,
Fixed thanks.
Giovanni
Fixed thanks.
Giovanni
- Sat May 27, 2023 10:18 am
- Forum: Bug Reports
- Topic: snor_device_verify_erase should not change BaseFlash::state Topic is solved
- Replies: 1
- Views: 184
Re: snor_device_verify_erase should not change BaseFlash::state Topic is solved
Hi,
Fixed as bug #1265.
Giovanni
Fixed as bug #1265.
Giovanni
- Thu May 25, 2023 10:51 am
- Forum: STM32 Support
- Topic: I2C init issue
- Replies: 1
- Views: 87
Re: I2C init issue
Hi,
It could be an HW issue, I2C bus can get stuck if a transaction is interrupted, for example by a CPU reset from the debugger.
Giovanni
It could be an HW issue, I2C bus can get stuck if a transaction is interrupted, for example by a CPU reset from the debugger.
Giovanni