Finally figuered it out:
#define SDADC_CR2_JEXTSEL_M(n) ((n)<<8)
#define SDADC_CR2_JEXTEN_M(n) ((n)<<13)
static const ADCConversionGroup adcgrpcfg1 = {
TRUE, // circular
ADC_GRP1_NUM_CHANNELS, // num_channels
adccallback, // end_cb
adcerrorcallback, // error_cb
.u.sdadc = {
/* CR2 ...
Search found 6 matches
- Thu Nov 03, 2016 10:26 pm
- Forum: ChibiOS/HAL
- Topic: stm32f37x sdadc timer trigger support
- Replies: 4
- Views: 3464
- Wed Nov 02, 2016 2:58 pm
- Forum: ChibiOS/HAL
- Topic: stm32f37x sdadc timer trigger support
- Replies: 4
- Views: 3464
Re: stm32f37x sdadc timer trigger support
but there is no routine for initializing a timer channel for output compare when using the timer as GPT, is there?
- Tue Nov 01, 2016 9:05 pm
- Forum: ChibiOS/HAL
- Topic: stm32f37x sdadc timer trigger support
- Replies: 4
- Views: 3464
stm32f37x sdadc timer trigger support
Hi all
The SDADC on the stm32f37x supports timer triggering, e.g. trigger SDADC3 from TIM12_CH2. There is no implementation in HAL 16 for enabling timer triggering, has someone done that before? The only option i see now would be to disable ADC HAL and do everything by hand...
Thanks for the reply ...
The SDADC on the stm32f37x supports timer triggering, e.g. trigger SDADC3 from TIM12_CH2. There is no implementation in HAL 16 for enabling timer triggering, has someone done that before? The only option i see now would be to disable ADC HAL and do everything by hand...
Thanks for the reply ...
- Mon Oct 17, 2016 9:54 am
- Forum: Bug Reports
- Topic: HAL ADC stm32f37x EXTSEL macro
- Replies: 1
- Views: 2890
HAL ADC stm32f37x EXTSEL macro
Hi all
I think that the macro ADC_CR2_EXTSEL_SRC defined in adc_lld.h for setting the external trigger is wrong. The EXTSEL bits [2:0] are located on [19:17] in ADC_CR2.
Line 38:
#define ADC_CR2_EXTSEL_SRC(n) ((n) << 24) /**< @brief Trigger source. */
should be
#define ADC_CR2_EXTSEL_SRC(n ...
I think that the macro ADC_CR2_EXTSEL_SRC defined in adc_lld.h for setting the external trigger is wrong. The EXTSEL bits [2:0] are located on [19:17] in ADC_CR2.
Line 38:
#define ADC_CR2_EXTSEL_SRC(n) ((n) << 24) /**< @brief Trigger source. */
should be
#define ADC_CR2_EXTSEL_SRC(n ...
- Wed Sep 28, 2016 9:05 pm
- Forum: General Support
- Topic: USB CDC send flush
- Replies: 2
- Views: 2889
Re: USB CDC send flush
WOW thank you very much, that solved the problem. I used https://github.com/ChibiOS/ChibiOS/blob/5c953ae7a200b9a2cd7c13f9cecd4d5aa7098d5f/testhal/STM32/STM32F3xx/USB_CDC/usbcfg.c
- Wed Sep 28, 2016 8:15 pm
- Forum: General Support
- Topic: USB CDC send flush
- Replies: 2
- Views: 2889
USB CDC send flush
Hello guys
I'm new to chibios/rt so bare with me please.
I want to implement the chibi shell over usb CDC. everything compiles and runs, for one exception: the controller doesnt send the data immediatly to the PC but waits until some kind of send buffer is full and then sends it all to the ...
I'm new to chibios/rt so bare with me please.
I want to implement the chibi shell over usb CDC. everything compiles and runs, for one exception: the controller doesnt send the data immediatly to the PC but waits until some kind of send buffer is full and then sends it all to the ...