ChibiOS Free Embedded RTOS

Hi steved,

I do not think this issue comes from your updated code, but is part of the not-yet-handled use cases.

The master cannot do anything in this case: as clock stretching has been left activated by default, the slave leaves the clock at the low level so the master is no longer able to ...

I'm not sure how the I2C slave implementation works when the master may perform a read request, with no actual data read out, for example to test if an I2C slave is connected to the I2C bus.

with the default configuration, as no data is preloaded (slaveNextReply.body == NULL. .size = 0), the SCL ...

Hi Giovanni,

I changed the function with this code (when I posted the question actually), and it indeed fixed the problem, but I was not sure it was the root cause.

Thanks for your help,
Manu.

While seeking the code, I noticed a couple of typos in the comments, unrelated to this issue.
I'm not ...

From ChibiOS_18.2.1/os/hal/osal/os-less/ARMCMx/osal.h


/**
* @brief Enters a critical zone from ISR context.
* @note This function cannot be used for reentrant critical zones.
*
* @special
*/
static inline void osalSysLockFromISR(void) {

#if CORTEX_MODEL == 0
__disable_irq();
#else ...

If I use the following kludge in the busy loop:


for(;;) {
__enable_irq();
__disable_irq();
}


the TIM2 ISR handler runs.

If I only move the IRQ enablement before the loop:


__enable_irq();
for(;;) {
}


the TIM2 ISR does not get called anymore.

I guess that "something" fails to ...

I call
osalSysEnable();
once HW configuration in complete (before the busy loop), which call __enable_irq() if I'm not mistaken.

I just give a tried and force OSAL_ST_MODE == OSAL_ST_MODE_NONE and it seems the ISR handler is called as expected. I'm not sure why.

As this setting is not part of the ...

I'm trying to use the HAL (os-less) mode for a PoC project (STM32L0, NUCLEO64_L053R8 and NUCLEO32_L011K4).

I've enabled one serial port (SD2) for debugging traces, one timer (TIM2), and a couple of GPIO.
STM32 uses HSI16 as the main clock source. I can observe the (scaled) clock on a GPIO (using ...

Other thing is - if the error callback is ever called, the error comes out as: I2cError: 0000 , which doesn't seem to make a lot of sense to me.
Any help?

Hi msichal,

I'm (successfully) using some variation of the I2C slave implementation w/ STM32L432.
I'm not 100% sure which variation it was ...

Hi,

I was having a look at the reference manual for STM32L0x3 devices, and its states that MSI clock ranges are 65356 << n, for n in [0..6], i.e. [65536..4194304]

However, the values defined in hal_lld.h ("taken from the STM8Lxx datasheet"), match a slightly different range, i.e. [65000..4200000 ...

Hi Faisal,

I was thinking using the timeout feature of the STM32L4 to get a timeout if no data is sent for a while, so that the buffer can be flushed, and the upper layer notified. So far, I've not been able to trigger such a timeout (RTOF/RTOIE bit, RTOR register).

Thanks for confirming I need to ...