ChibiOS Free Embedded RTOS

Bumped to ver21.11.3: https://github.com/trheinfels/ChibiOS/t ... provements

Also figured out that the locking issues from the last post were on my side. Austin's patch was correct about that to begin with!

Alright, seems like I didn't test it with system state debug

Austin's patch separates the actual transfer code from the ISR context in order to reuse it when performing the deferred transfer from thread level. The resulting I-class function _usb_ep0transferI did contain locks itself, though. Fix ...

Hey you two,

I know this is an old thread, but I think having means to defer control transfers to threads would greatly improve the USB driver. Think of flash interactions (e.g., USB-DFU), which you really wouldn't want to do (and which you can't do using EFL driver) inside an ISR context.

@Austin ...

Hi Giovanni,

sorry for the late reply, had to prepare the hardware. Works like expected as of the current trunk (r16277). Thanks for fixing it!


Best Regards,
Tim

Hi Giovanni,

sorry, I didn't find the time lately.

The peripherals (at least STM32L1) handle ZLPs just like any other packet: Setting the packet size to zero and marking the endpoint as valid will yield a ZLP at least in the bulk and control cases. This, however, has to be done by the driver. The ...

Hi Giovanni,

thank you very much for the quick reply. I'll gladly test the revised driver if you can point me to the sources (the github mirror does not contain those changes).


Cheers
Tim

Hi everybody,

I stumbled across another piece of the USB driver: for implementing a DFU function (and potentially any other control IN transfer), the device needs to send all data except for the last bytes as packets of the requested size. The host detects the end of the data stream when a short ...

Hi everybody,

I had some issues with a USB bulk function on an STM32L1 controller (basically an echo for now) in that replied garbage. I could narrow it down to the USB peripheral wreaking havoc in my IN region of PMA. Given the datasheet [1, pp. 615/3018 - 616/3018, especially table 107], this ...

Hi,

I'm currently implementing an isochronous data stream using UAC2 in asynch mode on an STM32L1 controller. To match the data rates, every once in a while an additional sample is transferred over the bus and this is where I get data corruption. Since I successfully ran the code on an STM32F4 ...

Hi,

the current LLD implementation for the STM32F4 family does not support the I2S PLL on the STM32F411xC/E (and presumably others).

- ChibiOS version
20.3.2 (as of the tag ver20.3.2 on the github mirror)

- Compiler
gcc version 10.2.0 (Arch Repository)

- Platform and board
STM32F411VET6 on ...