Hi,
I came across a strange problem with I2C init (ChibiOS-ver21.11.3). Basically, I have to start the I2C device twice, with a stop in between, to make any contact with my magnetometer:
i2cStart(&I2CD1, &i2c1cfg);
chThdSleepMilliseconds(100);
// If I don't execute the below lines.. ...
Search found 11 matches
- Thu May 25, 2023 9:37 am
- Forum: STM32 Support
- Topic: I2C init issue
- Replies: 1
- Views: 4731
- Tue Apr 25, 2023 6:48 pm
- Forum: General Support
- Topic: palEnableLineEvent issue
- Replies: 4
- Views: 26272
Re: palEnableLineEvent issue
Hi,
FYI, this turned out to be my fault (of course). I used `palSetLineCallback` on a GPIO PAD definition. Curious though that this does not result in any compiler error. I didn't look too much at the code, but you do define `PAL_LINE` as a tuple of port and pad.
In any case, all works when I use ...
FYI, this turned out to be my fault (of course). I used `palSetLineCallback` on a GPIO PAD definition. Curious though that this does not result in any compiler error. I didn't look too much at the code, but you do define `PAL_LINE` as a tuple of port and pad.
In any case, all works when I use ...
- Wed Apr 05, 2023 6:18 am
- Forum: General Support
- Topic: palEnableLineEvent issue
- Replies: 4
- Views: 26272
Re: palEnableLineEvent issue
Thanks for the answer!
I have another callback enabled on GPIOC_PIN4. That one works. I have now compiled the code with CH_DBG_ENABLE_ASSERTS. Nothing was printed to the serial console. I am using ChibiOS-ver21.11.3.
I can add some debug statements here and there, if you think it would help.
I have another callback enabled on GPIOC_PIN4. That one works. I have now compiled the code with CH_DBG_ENABLE_ASSERTS. Nothing was printed to the serial console. I am using ChibiOS-ver21.11.3.
I can add some debug statements here and there, if you think it would help.
- Tue Apr 04, 2023 10:09 pm
- Forum: General Support
- Topic: palEnableLineEvent issue
- Replies: 4
- Views: 26272
palEnableLineEvent issue
Hi, Giovanni,
I am having a hard time enabling an interrupt from an SPI device, which brings GPIOD_PIN2 low on my STM32F405. I have in my code:
palEnableLineEvent(GPIOD_PIN2_SPI3_INT, PAL_EVENT_MODE_FALLING_EDGE);
palSetLineCallback(GPIOD_PIN2_SPI3_INT, rfm22b_int_cb, NULL);
The device is ...
I am having a hard time enabling an interrupt from an SPI device, which brings GPIOD_PIN2 low on my STM32F405. I have in my code:
palEnableLineEvent(GPIOD_PIN2_SPI3_INT, PAL_EVENT_MODE_FALLING_EDGE);
palSetLineCallback(GPIOD_PIN2_SPI3_INT, rfm22b_int_cb, NULL);
The device is ...
- Wed Dec 29, 2021 7:34 pm
- Forum: General Support
- Topic: Position-independent Chibios
- Replies: 3
- Views: 4056
Re: Position-independent Chibios
Yes, I was expecting that in addition to the PIC stuff I need to do something with the interrupt handlers. But would it not be possible to place the interrupt vectors in RAM and update them in the bootloader? Assuming the bootloader knows the offset of the application, it could make such a table.
I ...
I ...
- Wed Dec 29, 2021 6:28 pm
- Forum: General Support
- Topic: Position-independent Chibios
- Replies: 3
- Views: 4056
Position-independent Chibios
Hi!
I am trying to understand what would be needed to compile and run a relocatable Chibios application. A standard way is to compile my app for base address 0x8000000 on my STM32F4, flash it, and it runs. What I would like to do is have a few such complete Chibios applications in different ...
I am trying to understand what would be needed to compile and run a relocatable Chibios application. A standard way is to compile my app for base address 0x8000000 on my STM32F4, flash it, and it runs. What I would like to do is have a few such complete Chibios applications in different ...
- Wed Dec 29, 2021 2:17 pm
- Forum: Bug Reports
- Topic: Problems with shell on STM32F405
- Replies: 9
- Views: 9300
Re: Problems with shell on STM32F405
Hi, Giovanni,
I have tested my board with STM32_OTG_STEPPING=1 and it works fine. I get a shell, tests pass. With STM32_OTG_STEPPING=2 USB serial device does not work. I guess it's a bug?
Marcin
I have tested my board with STM32_OTG_STEPPING=1 and it works fine. I get a shell, tests pass. With STM32_OTG_STEPPING=2 USB serial device does not work. I guess it's a bug?
Marcin
- Thu Dec 23, 2021 8:06 am
- Forum: Bug Reports
- Topic: Problems with shell on STM32F405
- Replies: 9
- Views: 9300
Re: Problems with shell on STM32F405
Hi, Giovanni,
I have found a difference between 21.11.x and the other earlier versions in how USB is set up. In all earlier versions file
os/hal/ports/STM32/STM32F4xx/stm32_registry.h
in the section for my MCU (STM32F40_41xxx) contains
#define STM32_OTG_STEPPING 1
while in version ...
I have found a difference between 21.11.x and the other earlier versions in how USB is set up. In all earlier versions file
os/hal/ports/STM32/STM32F4xx/stm32_registry.h
in the section for my MCU (STM32F40_41xxx) contains
#define STM32_OTG_STEPPING 1
while in version ...
- Tue Dec 21, 2021 12:13 am
- Forum: Bug Reports
- Topic: Problems with shell on STM32F405
- Replies: 9
- Views: 9300
Re: Problems with shell on STM32F405
I think this is also correct. From board.h:
#define STM32_HSECLK 8000000U
and in mcuconf.h
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
#define STM32_LSE_ENABLED FALSE
#define STM32_CLOCK48_REQUIRED TRUE
#define STM32_SW STM32_SW_PLL
#define ...
#define STM32_HSECLK 8000000U
and in mcuconf.h
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
#define STM32_LSE_ENABLED FALSE
#define STM32_CLOCK48_REQUIRED TRUE
#define STM32_SW STM32_SW_PLL
#define ...
- Mon Dec 20, 2021 9:21 pm
- Forum: Bug Reports
- Topic: Problems with shell on STM32F405
- Replies: 9
- Views: 9300
Re: Problems with shell on STM32F405
Thanks, Giovanni. This is also what I suspect, but I'm not able to pin the problem. All looks ok. LEDs always work, it's just the USB and serial driver that seem to fail in the newest version (USB device is not recognized by Linux). And USB seems to work in 20.3.x and 21.6.x, but the shell thread is ...