ChibiOS Free Embedded RTOS

Today I took again a look on the demo STM32F1xx-I2C.

And then I found the culprit:

I did set the default output to open drain, not the alternate…

Wrong:

#define VAL_GPIOBCRL 0x55888833


Correct:

#define VAL_GPIOBCRL 0xDD888833 /* PB7...PB0 */


Thanks again for your time and ...

I stepped through the code.
At i2cStart the status changes from 1 "I2C_STOP" to 2 "I2C_READY".

In i2cMasterTransmitTimeout it then changes to 3 "I2C_ACTIVE_TX".
in i2c_lld_master_transmit_timeout

if (!(dp->SR2 & I2C_SR2_BUSY) && !(dp->CR1 & I2C_CR1_STOP))

directly break; in the first iteration ...

Thanks for the fast reply.

state checks and assert where already enabled.
enabled statistics too.
However I'm not sure how to read this.

What I found is, that at entering i2cMasterTransmitTimeout the second time i2cp state is already at I2C_LOCKED .

osalDbgAssert then enters chSysHalt ...

Hi,

I'm trying to get I2C to run but after a few days of searching and stripping down my project to the bare minimum for I2C I never see a single bit sent on I2C outputs (no signal change on oscilloscope), no clock.

I made sure that the outputs actually work by toggling the output and seeing the ...

Thanks a lot.
Somehow I missed this information in the article.
It's right there…

Hi,

I wanted to implement this method for event based reading buttons from this article: m

However, I get the error undefined reference to `palEnableLineEvent'

I did set #define HAL_USE_PAL TRUE in halconf.h

I can see the definition of it in C:\ChibiStudio\chibios2111\os\hal\include\hal_pal.h ...

There are two different #define for __spi_wakeup_isr.
One:


and the second which becomes active when setting

Thanks for the correction. Had a number swapped in my calculation (265 instead of 256)…
Will go further from that to the uGFX guys again.

I just thought about it a bit more. I hope I can get to the bottom of this.

This is what I found today after reading further into the code:
gdisp_lld_SSD1322.c

#ifndef GDISP_SCREEN_HEIGHT
#define GDISP_SCREEN_HEIGHT 64
#ifndef GDISP_SCREEN_WIDTH
#define GDISP_SCREEN_WIDTH 256
#define SSD1322 ...

This is what I could find:
ram = RAM(g)+xyaddr(x,y);
*ram &= ~xybits(x, y, LLDCOLOR_MASK());

RAM, LLDCOLOR_MASK translate to:
#define RAM(g) ((gU8 *)g->priv)
#define LLDCOLOR_MASK() ((1 << LLDCOLOR_BITS)-1)
#define LLDCOLOR_BITS (GDISP_LLD_PIXELFORMAT & 0xFF)
#define GDISP_LLD_PIXELFORMAT GDISP ...