ChibiOS Free Embedded RTOS

Hi,

I passed patches to Codex AI for a quick review, could you look into those findings?

- os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c:309-315 — The new RXDAVL drain
loop has no timeout and no early break on RXOVERR. If the DMA stalls and
RXDAVL stays set (e.g., FIFO overflow with DMA halted ...

Thanks for the information.

I think adding a timeout could be useful for the sleeps in these drivers. I'm not sure it's the best idea for the DMA waits, but could be useful insurance after the proposed adjustments. I am unsure why only this driver needs to do them?

Certain error states on the SD card bus can get the data path state machine (DPSM) stuck busy. According to the reference manual, it can be aborted by sending a command using the command path state machine (CPSM) with the CMDSTOP bit set in the CMD register. As ChibiOS does not use the CMDSTOP bit ...

Additionally, attached are the corresponding patches for SDIOv1. It already does the start bit error detection logic on some chips (but not all, this may be another fib on ST's part to correct later). I also incorporated a patch from ChibiOS to move transfer preparation before transfer start that ...

I have updated the SDMMCv1 patches to take the start bit error detection logic from SDIOv1. It turns out that is the mysterious reserved status bit I saw asserted sometimes. I don't know why the reference manual documents it as reserved.

The new patches are attached (and replace the old ones). I ...

Using the ArduPilot project ChibiOS fork on an STM32F765 based Pixhawk 4 Mini flight controller and an SD card prone to errors (in this case created by mechanical vibration), the SDMMCv1 peripheral can signal a CRC error in the middle of a transfer.

If this happens, the peripheral no longer is ...