ChibiOS Free Embedded RTOS

Hi,

thank you very much for submitting this. atm it's the only working solution for getting my RPico board running from flash, and I really would like to
use these devices with chibios.

Fred

This category of strange behavior tends to drive a developer insane

Two things I can think of:

1. did you compile with the correct arch for Caterina? According to the source I found here there's at least some requirement to compile with a #define __AVR_ATmega32U4__ in your code. Maybe you forgot ...

Stupid question, but is the value of last_width you're seeing larger than 57? If it's not then integer divide is just going to return 0;

Secondly, declare the variable with volatile if you don't want the optimizer to touch it:

If granularity on the scale of a second is good enough, use the RTC_EVENT_SECOND :


//seconds since boot tracker
uint32_t secondsSinceBoot = 0;

static void RTC_callback(RTCDriver *rtcp, rtcevent_t event) {
(void)rtcp;

switch (event) {
case RTC_EVENT_OVERFLOW: break;
case RTC_EVENT_SECOND ...

In his map file (m) why is there an association between .ccm and the 0x20000000 address base?


.ccm 0x200016a0 0x8358 load address 0x0802c8dc
.ccm 0x200016a0 0x4a38 build/obj/datalogging.o
.ccm 0x200060d8 0xd60 build/obj/flash_main.o
0x200060d8 flashState
.ccm ...

Hi,

I looked into this a while back and from what I remember the RTC hardware on STM32F4 doesn't actually calculate whether DS should be applied or not. Instead it has 2 register bits SUB1H and ADD1H to automatically substract or add 1 hour to the RTC value when it's read.

Correct me if I'm wrong ...

Did you remap the SCK pin for SPI3?

From the ref manual page 856:


Since some SPI1 and SPI3/I2S3 pins may be mapped onto some pins used by the JTAG interface (SPI1_NSS onto JTDI, SPI3_NSS/I2S3_WS onto JTDI and SPI3_SCK/I2S3_CK onto JTDO ), you may either:
– map SPI/I2S onto other pins
– disable ...

Hi,

it would appear that you're running SPI3 at full clock (last value in spi3cfg is 0). Just glanced the MAX31855 datasheet and it seems to state max clock of 5MHz.

If I remember correctly, SPI3 runs on a half-clock compared to SPI1 & SPI2, so take that into account.

Edit:
check out http://forum ...

Hi,

I've run into a strange issue when remapping some pins for the STM32f103ZET6 device.

The issue is as follows:

SPI3 uses PB3 and PB4 for CLK and MISO. In regular operation these pins function as JTDO and NJTRST resp. According to the datasheet I need to remap them by setting SWJ _CFG[2:0] to ...

Hi Tectu,

Last weekend I followed the article to implement 2 sub-banks (LCD + SRAM) and there were some things that I thought needed to be added. I've taken the liberty of expanding the article with an additional example and some details.

BTW, your code uses BUSTURN settings in the timing. I don't ...