GFX on STM32F103Z

[Badger]

The FSMC setup is very simple and is handled by GFX. All it does is enable the clock and set bus width and timing options (see code here). Does the exception occur when accessing either GDISP_REG or GDISP_RAM?

[E-B Felix]

Hi Badger

thanks for this info.

the write "GDISP_REG = lcdReg" works but it crash by the write "GDISP_RAM = lcdRegValue"

On the Open103Z there is an external adress decoder because the board suport differnet /CS for the peiperal. I had to change the adresses.
My settings are:

Code: Select all

   #define GDISP_REG              (*((volatile uint16_t *) 0x6F000000)) /* RS = 0 */
   #define GDISP_RAM              (*((volatile uint16_t *) 0x6F010000)) /* RS = 1 */


I will check thes FSMC settings against my running code without ChibiOS and GFX.


Thanks
Felix

[E-B Felix]

Hi Badger, Tectu

my OpenZ103 is working with the SSD1289 driver.

I used the following settings in GDISP_LLD():

Code: Select all

#if defined(GDISP_USE_FSMC)

   #if defined(STM32F1XX) || defined(STM32F3XX) || defined( STM32F10X_HD )
      /* FSMC setup for F1/F3 */
      rccEnableAHB(RCC_AHBENR_FSMCEN, 0);

      #if defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)
         #error "DMA not implemented for F1/F3 Devices"
      #endif
   #elif defined(STM32F4XX) || defined(STM32F2XX)
      /* STM32F2-F4 FSMC init */
      rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);

      #if defined(GDISP_USE_DMA) && defined(GDISP_DMA_STREAM)
         if (dmaStreamAllocate(GDISP_DMA_STREAM, 0, NULL, NULL)) chSysHalt();
         dmaStreamSetMemory0(GDISP_DMA_STREAM, &GDISP_RAM);
         dmaStreamSetMode(GDISP_DMA_STREAM, STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_DIR_M2M); 
      #endif
   #else
      #error "FSMC not implemented for this device"
   #endif

   /* set pins to FSMC mode */
   IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 8) |
                     (1 << 9) | (1 << 10)  | (1 << 14) | (1 << 15), 0};

   IOBus busE = {GPIOE, (1 << 2) | (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |
                  (1 << 13) | (1 << 14) | (1 << 15), 0};

   IOBus busG = {GPIOG, (1 << 5) | (1 << 12) | (1 << 13), 0};


#if defined(STM32F1XX) || defined(STM32F3XX) || defined( STM32F10X_HD )
   palSetBusMode(&busD, PAL_MODE_STM32_ALTERNATE_PUSHPULL );
   palSetBusMode(&busE, PAL_MODE_STM32_ALTERNATE_PUSHPULL );
   palSetBusMode(&busG, PAL_MODE_STM32_ALTERNATE_PUSHPULL );
#elif defined(STM32F4XX) || defined(STM32F2XX)
   palSetBusMode(&busD, PAL_MODE_ALTERNATE(12));
   palSetBusMode(&busE, PAL_MODE_ALTERNATE(12));
#else
   #error "palSetBusMode not implemented for this device"
#endif

//   const unsigned char FSMC_Bank = 0;
   const unsigned char FSMC_Bank = 6;
   /* FSMC timing */
   FSMC_Bank1->BTCR[FSMC_Bank+1] = (FSMC_BTR1_ADDSET_1 | FSMC_BTR1_ADDSET_3) \
         | (FSMC_BTR1_DATAST_1 | FSMC_BTR1_DATAST_3) \
         | (FSMC_BTR1_BUSTURN_1 | FSMC_BTR1_BUSTURN_3) ;

   /* Bank1 NOR/SRAM control register configuration
    * This is actually not needed as already set by default after reset */
   FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;
#endif


But I think those HW settings should not be in the generic driver. Maybe we should move those init stuff in a file like gdisp_lld_board.c or so in the board directory.

Comments are welcome.

Cheers
Felix

[Badger]

I agree that those settings are very specific to each application. They're useful as a guide, but really the library should be designed such that the user does not have to modify the driver at all.

Maybe we add some new macros that lets the user do their own initialisation for each step (fsmc setup, pin config, timing), which if set override the defaults.

[mobyfab]

Indeed we need to make these sections more abstract.

[Tectu]

Thanks for your code, E-B Felix.
I agree that we definitely need to add some better interface and/or add a new abstraction for this. There are still so many things on my ToDo list related to GFX, it's really hard to spend time for everything


~ Tectu

[Abhishek]

I've begun discussion for a new LLD framework here, in this topic: viewtopic.php?f=11&t=726

Abhishek