I want to use the ChibiOS Eclipse Plugin and followed this instructions to set up OpenOCD properly
http://chibios-book.readthedocs.org/en/ ... g_threads/
But OpenOCD doesn't detect ChibiOS.
When I start OpenOCD with the flag "-rtos auto" I get the following message:
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Warn : No RTOS could be auto-detected!
when I change it to "-rtos ChibiOS" I get a more specific message:
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Warn : RTOS ChibiOS not detected. (GDB could not find symbol 'chSysInit')
My OpenOCD config options are the following
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-f /Applications/OpenOCD/0.9.0-201505191004/scripts/interface/stlink-v2.cfg -f /Applications/OpenOCD/0.9.0-201505191004/scripts/target/stm32f4x.cfg /Applications/OpenOCD/0.9.0-201505191004/scripts/board/olimex_stm32_f407.cfg -c "stm32f4x.cpu configure -rtos ChibiOS"
And I use this initialization command (only this one):
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file ${workspace_loc:/build/project.elf}
I use the latest ChibiOS code from the github master branch (commit 2698f6f13ee3efda9348ef9761a445465900f7ae) and my OpenOCD version is 0.9.0-201505191004.
I have an ST-Link/v2 debugger, a Olimex STM32-E407 board and develop under MacOS X.
Hope you can help me solve my problem!
Thanks,
Stefan
here is the complete OpenOCD output:
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GNU ARM Eclipse 64-bits Open On-Chip Debugger 0.9.0-00073-gdd34716 (2015-05-19-12:55)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'.
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
adapter speed: 2000 kHz
adapter_nsrst_delay: 100
none separate
Started by GNU ARM Eclipse
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
Info : clock speed 1800 kHz
Info : STLINK v2 JTAG v17 API v2 SWIM v4 VID 0x0483 PID 0x3748
Info : using stlink api v2
Info : Target voltage: 3.243799
Info : stm32f4x.cpu: hardware has 6 breakpoints, 4 watchpoints
Info : accepting 'gdb' connection on tcp/3333
Info : device id = 0x10036413
Info : flash size = 1024kbytes
undefined debug reason 7 - target needs reset
Warn : RTOS ChibiOS not detected. (GDB could not find symbol 'chSysInit')
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x080001c0 msp: 0x20000400
Warn : RTOS ChibiOS not detected. (GDB could not find symbol 'chSysInit')
Warn : RTOS ChibiOS not detected. (GDB could not find symbol 'chSysInit')
semihosting is enabled
Warn : RTOS ChibiOS not detected. (GDB could not find symbol 'chSysInit')
Warn : RTOS ChibiOS not detected. (GDB could not find symbol 'chSysInit')
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x080001c0 msp: 0x20000400, semihosting
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x080001c0 msp: 0x20000400, semihosting
Info : Padding image section 0 with 3 bytes
target state: halted
target halted due to breakpoint, current mode: Thread
xPSR: 0x61000000 pc: 0x20000042 msp: 0x20000400, semihosting
Warn : keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not sent! (1203). Workaround: increase "set remotetimeout" in GDB
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x080001c0 msp: 0x20000400, semihosting
===== arm v7m registers
(0) r0 (/32): 0x00000000
(1) r1 (/32): 0x00000000
(2) r2 (/32): 0x00000000
(3) r3 (/32): 0x00000000
(4) r4 (/32): 0x00000000
(5) r5 (/32): 0x00000000
(6) r6 (/32): 0x00000000
(7) r7 (/32): 0x00000000
(8) r8 (/32): 0x00000000
(9) r9 (/32): 0x00000000
(10) r10 (/32): 0x00000000
(11) r11 (/32): 0x00000000
(12) r12 (/32): 0x00000000
(13) sp (/32): 0x20000400
(14) lr (/32): 0xFFFFFFFF
(15) pc (/32): 0x080001C0
(16) xPSR (/32): 0x01000000
(17) msp (/32): 0x20000400
(18) psp (/32): 0x00000000
(19) primask (/1): 0x00
(20) basepri (/8): 0x00
(21) faultmask (/1): 0x00
(22) control (/2): 0x00
(23) d0 (/64): 0x0000000000000000
(24) d1 (/64): 0x0000000000000000
(25) d2 (/64): 0x0000000000000000
(26) d3 (/64): 0x0000000000000000
(27) d4 (/64): 0x0000000000000000
(28) d5 (/64): 0x0000000000000000
(29) d6 (/64): 0x0000000000000000
(30) d7 (/64): 0x0000000000000000
(31) d8 (/64): 0x0000000000000000
(32) d9 (/64): 0x0000000000000000
(33) d10 (/64): 0x0000000000000000
(34) d11 (/64): 0x0000000000000000
(35) d12 (/64): 0x0000000000000000
(36) d13 (/64): 0x0000000000000000
(37) d14 (/64): 0x0000000000000000
(38) d15 (/64): 0x0000000000000000
(39) fpscr (/32): 0x00000000
===== Cortex-M DWT registers
(40) dwt_ctrl (/32)
(41) dwt_cyccnt (/32)
(42) dwt_0_comp (/32)
(43) dwt_0_mask (/4)
(44) dwt_0_function (/32)
(45) dwt_1_comp (/32)
(46) dwt_1_mask (/4)
(47) dwt_1_function (/32)
(48) dwt_2_comp (/32)
(49) dwt_2_mask (/4)
(50) dwt_2_function (/32)
(51) dwt_3_comp (/32)
(52) dwt_3_mask (/4)
(53) dwt_3_function (/32)