Assessment of the difficulty in porting CPU architecture for ChibiOS

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wangyuxuan222
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Assessment of the difficulty in porting CPU architecture for ChibiOS

Postby wangyuxuan222 » Wed Dec 06, 2023 6:02 am

Hello everyone! I am working on implementing a tool to assess the complexity of CPU architecture porting. It primarily focuses on RISC-V architecture porting. In fact, the tool may have an average estimate of various architecture porting efforts.My focus is on the overall workload and difficulty of transplantation in the past and future,even if a project has already been ported.As part of my dataset, I have collected the **ChibiOS** project. **I would like to gather community opinions to support my assessment. I appreciate your help and response!** Based on scanning tools, the porting complexity is determined to be moderate, with a moderate amount of code related to the CPU architecture in the project. Is this assessment accurate?Do you often have any opinions on personnel allocation and consumption time? I look forward to your help and response.

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Giovanni
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Re: Assessment of the difficulty in porting CPU architecture for ChibiOS

Postby Giovanni » Wed Dec 06, 2023 6:44 am

Hi,

Not sure what your question is, anyway, the RISC-V port complexity is not high, pretty average.

Giovanni

wangyuxuan222
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Re: Assessment of the difficulty in porting CPU architecture for ChibiOS

Postby wangyuxuan222 » Wed Dec 06, 2023 8:32 am

Giovanni wrote:Hi,

Not sure what your question is, anyway, the RISC-V port complexity is not high, pretty average.

Giovanni

Thank you very much for your reply. My tool believes that there are still many assembly codes that need to be transplanted and modified. Do you think this is correct?

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Re: Assessment of the difficulty in porting CPU architecture for ChibiOS

Postby Giovanni » Wed Dec 06, 2023 8:41 am

There is little asm code in ports, below 100 lines.

Giovanni


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