Threads are not affected by the cache, all threads go through the cache in the same way, the problem is coherence with other bus masters such as DMAs that don't go through the cache, there is no HW cache coherence mechanism in Cortex-M.
ChibiOS critical sections provide implicitly a memory barrier, all other primitives use those.
http://www.chibios.org/dokuwiki/doku.ph ... _coherence
Giovanni
Where to start STM32H7 support
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Re: Where to start STM32H7 support
Sorry - another question. We are running into the corrupt CRC issues with flash that some people have reported, this appears to generate a busfault. What I would like to do is disable the busfault temporarily and if I hit it erase the offending page. However, the busfault suspension is not working for me. I am using (roughly):
uint32_t oldSHCSR = SCB->SHCSR;
uint32_t vSHCSR = oldSHCSR;
(void)vSHCSR;
// enable separate BUSFAULT exception:
vSHCSR |= SCB_SHCSR_BUSFAULTENA_Msk;
SCB->SHCSR = vSHCSR;
vSHCSR = SCB->SHCSR; // read back
__disable_fault_irq();
__DSB();
and then checking:
// did we get a busfault while reading?
vSHCSR = SCB->SHCSR;
if (vSHCSR & (SCB_SHCSR_BUSFAULTPENDED_Msk | SCB_SHCSR_BUSFAULTACT_Msk)) {
SCB->SHCSR = oldSHCSR;
// handle the fault here
}
but this does not seem to work and indeed using __disable_fault_irq()/__enable_fault_irq() seems to interfere with ChibiOS in some way - any ideas?
uint32_t oldSHCSR = SCB->SHCSR;
uint32_t vSHCSR = oldSHCSR;
(void)vSHCSR;
// enable separate BUSFAULT exception:
vSHCSR |= SCB_SHCSR_BUSFAULTENA_Msk;
SCB->SHCSR = vSHCSR;
vSHCSR = SCB->SHCSR; // read back
__disable_fault_irq();
__DSB();
and then checking:
// did we get a busfault while reading?
vSHCSR = SCB->SHCSR;
if (vSHCSR & (SCB_SHCSR_BUSFAULTPENDED_Msk | SCB_SHCSR_BUSFAULTACT_Msk)) {
SCB->SHCSR = oldSHCSR;
// handle the fault here
}
but this does not seem to work and indeed using __disable_fault_irq()/__enable_fault_irq() seems to interfere with ChibiOS in some way - any ideas?
Re: Where to start STM32H7 support
Giovanni wrote:On a different platform I had to implement a safe_memcpy() function which is supposed to resist accessing locations with ECC errors and just return an error flag in case of failure.
Globally:
- Define a global pointer exc_return setting it to NULL.
I did the following in safe_memcpy:
- Set the pointer to an exit handler in case of exception.
- Perform the operation.
- Memory data barrier, need to make sure the exception happens before next sterp.
- Set the pointer to NULL again.
- Return false (no error).
In the exit handler:
- Return true (error).
In the exception handler:
- Check if the pointer is NULL, if so do the normal exception handling (stop).
- Change the return address of the handler to the location pointed by the pointer.
- Set the pointer to NULL.
- Return from exception on the exit handler.
You could use a similar approach.
Giovanni
Er, how do I do this (change the return address of the exception handler to resume the code that faulted)? I found https://stackoverflow.com/a/38619316 but it all looks pretty hairy.
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Re: Where to start STM32H7 support
Hi,
When you are in an exception your PSP register points to saved registers, you need to alter those in order to tweak the return address, note, you should read carefully the Cortex-M manuals because it is not simple matter. Anyway the saved structure is exactly equal to the port_extctx structure in ChibiOS which represents the exception context.
Giovanni
When you are in an exception your PSP register points to saved registers, you need to alter those in order to tweak the return address, note, you should read carefully the Cortex-M manuals because it is not simple matter. Anyway the saved structure is exactly equal to the port_extctx structure in ChibiOS which represents the exception context.
Giovanni
Re: Where to start STM32H7 support
Giovanni wrote:Hi,
When you are in an exception your PSP register points to saved registers, you need to alter those in order to tweak the return address, note, you should read carefully the Cortex-M manuals because it is not simple matter. Anyway the saved structure is exactly equal to the port_extctx structure in ChibiOS which represents the exception context.
Giovanni
Ok thanks - and simply suspending the busfault handler is not an option?
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Re: Where to start STM32H7 support
Giovanni wrote:Suspending how? you can't use OS functions in there.
Giovanni
Like the example here: https://community.st.com/s/question/0D5 ... g-readback
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Re: Where to start STM32H7 support
Well, try it, it is more of an STM32-related thing than OS-related anyway.
Giovanni
Giovanni
Re: Where to start STM32H7 support
Giovanni wrote:Well, try it, it is more of an STM32-related thing than OS-related anyway.
Giovanni
Yeah I did, but __disable_fault_irq() seems to do something to the ChibiOS exception handlers. I don't get the bus fault anymore but neither of the fault bits appear to be set in SHCSR, so I wondered whether it was some kind of known interaction. Does ChibiOS set the SCB_SHCSR_BUSFAULTENA_Msk bit by default?
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Re: Where to start STM32H7 support
Nope, it does not touch things it does not use directly. You may inspect it before and after OS initializations. just in case.
Giovanni
Giovanni
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