Where to start STM32H7 support

ChibiOS public support forum for topics related to the STMicroelectronics STM32 family of micro-controllers.

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Re: Where to start STM32H7 support

Postby geebee » Thu Aug 06, 2020 6:09 pm

Giovanni,

I have a system which uses the SDMMC driver with a STM32H743, and I'm bumping into a weird issue.

sdcConnect() fails in sdc_detect_bus_clk(). If I simply add a return early and force to run at 25 MHz, everything seems to work fine:

Code: Select all

@@ -323,6 +323,7 @@ static bool sdc_detect_bus_clk(SDCDriver *sdcp, sdcbusclk_t *clk) {
 
   /* Safe default.*/
   *clk = SDC_CLK_25MHz;
+  return HAL_SUCCESS; // TEMP^M
 
   /* Looks like only "high capacity" cards produce meaningful results during
      this clock detection procedure.*/


but the method as is fails in sdc_lld_read_special(). The exact place where it fails is in sdc_lld_wait_transaction_end(),

Code: Select all

  if ((sdcp->sdmmc->STA & SDMMC_STA_DATAEND) == 0) {
    osalSysUnlock();
    return HAL_FAILED;
  }


but really all that happens is that the transaction fails so that function gets woken up by the interrupt to process the completion (or error in this case). I can't figure out why the error happens or a workaround other than forcing to 25 MHz, but the registers indicate that it's an RX fifo overrun/IDMA transfer error. STA is 0x8001020.

Also, it seems that the default for STM32_SDMMC_MAXCLK is set to 50MHz, but it could be upped substantially for the H7. From Table 59/page 352 of the manual it seems that 100 MHz is safe for all voltage scaling settings, and can go up to 250. I have tested below 50 MHz, but also tried to increase to almost 100 to see if it changed anything, unsuccessfully.

GB

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Re: Where to start STM32H7 support

Postby Giovanni » Thu Aug 06, 2020 6:15 pm

Which H7 revision? what kind of card? board?

It is hard to debug this kind of things without being able to reproduce the problem.

Giovanni

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Re: Where to start STM32H7 support

Postby geebee » Thu Aug 06, 2020 6:33 pm

It's revision V. The card is an 8 GB Sandisk Industrial micro SD HC I.

As for the board, unfortunately I don't have an available standard board from ST, but the relevant part should be the same, as the SD card is just connected to the MCU directly at a very short distance, and the VDD pin is bypassed.

From the way this thread ended I wasn't sure the driver got tested on H7 so I added to here. But if it has been seen working at 50 MHz on one of the ST boards I'll try to get my hands on one and see what's different.

The same SD card (and board setup) has worked fine on a number of F7 and L4 designs as far as coming up, but I have never verified if in those firmwares it was being picked up as 25 or 50 MHz. I can try to look into that if it's helpful.

GB

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Re: Where to start STM32H7 support

Postby Giovanni » Thu Aug 06, 2020 7:47 pm

OK, it could be a wiring issue, it happened already in the past with SD cards connected using wires.

If cost is not an issue then you could get a discovery board and see if it makes a difference.

Giovanni

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Re: Where to start STM32H7 support

Postby andypiper » Mon Jan 18, 2021 10:09 am

Hi Giovanni

I am porting our flight control software to an H743 and seeing some weird issues with DMA. I believe I have got the cache coherency correct, but I have a question:

In our code we were writing directly to a TX DMA buffer while it was in use (so DMA transaction happening reading from the buffer to write to a peripheral and a thread writing to the buffer at the same time). This appeared to cause watchdogs and I have changed the code to prevent this, but I was wondering - is the assumption invalid or valid because it appears to work on F4 and F7 boards.

Regards

andy

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Re: Where to start STM32H7 support

Postby Giovanni » Mon Jan 18, 2021 10:49 am

Hi,

What do you mean by watchdogs? is it triggering a watchdog reset? if so then the program halts for some reason and the WD is not reset in time.

If this is the case I don't see how a CPU write into a memory being read by a DMA could cause this. Is that memory cacheable?

Giovanni

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Re: Where to start STM32H7 support

Postby andypiper » Tue Jan 19, 2021 9:11 am

Giovanni wrote:Hi,

What do you mean by watchdogs? is it triggering a watchdog reset? if so then the program halts for some reason and the WD is not reset in time.

If this is the case I don't see how a CPU write into a memory being read by a DMA could cause this. Is that memory cacheable?

Giovanni


HI Giovanni, yes the program gets a hard fault

The memory is cacheable

andy

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Re: Where to start STM32H7 support

Postby Giovanni » Tue Jan 19, 2021 10:26 am

You need to understand what causes the hard fault, probably it is not just the concurrent access, there must be a specific instruction causing the fault.

Giovanni

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Re: Where to start STM32H7 support

Postby andypiper » Tue Jan 19, 2021 11:19 pm

Thanks Giovanni. Here's an equally perplexing question:

I am doing alternate pwm output and input capture on TIM1 and TIM3. This code works fine on F7 and H4 and mostly fine on H7 except the use of TIM1. Any attempt to setup CCMR1/CCMR2/CCER to do IC seems to break the channel (pwm no longer works) and I cannot figure it out. Is there something special about TIM1 on H7 other than the additional two channels that it has? the pwm output is using ChibiOS pwm so CCMR/CCER should be reset as I am doing pwmStop/pwmStart but it literally does not work and is driving me nuts.

Any pointers appreciated!

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Re: Where to start STM32H7 support

Postby Giovanni » Wed Jan 20, 2021 8:58 am

Hi,

As far I know TIMs are exactly the same on all platforms. Are you changing PWM channels settings on the fly?

Giovanni


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