STM32H7 ADC2 ? (on 20.3.x)

[timothyzillion]

have ADC1 and ADC3 working on an STM32H7. The only complication was the DMA / BDMA stuff on ADC3.

Has anyone used ADC2 on an STM32H7 ? I have a board with a signal routed to ADC2_INP6, I had originally thought that it would be easy to
use ADC2 in "non-dual"/independent mode. So I want to have the following macros defined:

STM32_ADC_USE_ADC1 TRUE
STM32_ADC_USE_ADC2 TRUE
STM32_ADC_DUAL_MODE FALSE

But the ADC1/2 ISR seems to have some stuff hard-coded for ADCD1
https://github.com/ChibiOS/ChibiOS/blob ... lld.c#L320

Also, just looking around, https://github.com/ChibiOS/ChibiOS/blob ... _adc_lld.h doesn't seem to have much related to STM32_ADC_USE_ADC2.

OK, so maybe that's not really supported ? I don't know much about dual-mode, but that would be fine for me too (makes my higher level interface a little uglier, but not too bad). How about that ? I got a ways into trying to make that work, and then noticed that there is no separate PCSEL structure for ADC2 (ie no PCSEL analog of the SSQR and SSMPR) in this structure:
https://github.com/ChibiOS/ChibiOS/blob ... lld.h#L649

and, in fact, the PCSEL config copy appears to re-use the ADC1 PCSEL twice:
https://github.com/ChibiOS/ChibiOS/blob ... lld.c#L681

so if I want to configure ADC1 to use, say, channel-11, and ADC2 to use channel-6 -- I guess I just end up using both channels on both ADC units ? I actually have a bunch of ADC1 inputs I want to use, along with inp-6 on ADC2. I suppose it does no harm to have the preselect configured if the inputs aren't in my SQR schedule (?), so maybe this doesn't matter. Still the PCSEL thing made me wonder if am doing something new or strange by trying to use ADC2.

Has anyone successfully used ADC2 (in dual or independent mode) on an H7?

[Giovanni]

Hi,

The H7 ADC driver does not support independent ADC2 mode, this is why the enable switch is named STM32_ADC_USE_ADC12. ADC2 is pretty much intended to be a slave of ADC1, clock settings and IRQs are shared too.

Dual mode should work but I haven't tested it for a while, the following configuration should work:

Code: Select all

/*
 * ADC driver system settings.
 */
#define STM32_ADC_DUAL_MODE                 TRUE
#define STM32_ADC_SAMPLES_SIZE              32
#define STM32_ADC_USE_ADC12                 TRUE
#define STM32_ADC_USE_ADC3                  TRUE
#define STM32_ADC_ADC12_DMA_STREAM          STM32_DMA_STREAM_ID_ANY
#define STM32_ADC_ADC3_BDMA_STREAM          STM32_BDMA_STREAM_ID_ANY
#define STM32_ADC_ADC12_DMA_PRIORITY        2
#define STM32_ADC_ADC3_DMA_PRIORITY         2
#define STM32_ADC_ADC12_IRQ_PRIORITY        5
#define STM32_ADC_ADC3_IRQ_PRIORITY         5
#define STM32_ADC_ADC12_CLOCK_MODE          ADC_CCR_CKMODE_ADCCK
#define STM32_ADC_ADC3_CLOCK_MODE           ADC_CCR_CKMODE_ADCCK


Giovanni