F412 PLL clock config

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F412 PLL clock config

Postby hybridA » Mon Aug 08, 2022 2:26 am

I'm using an F412RE with an 8MHz oscillator.

Using this config (generated with the ST clock config tool, to get a 100MHz sysclk) it gets stuck forever, waiting for HSE to stabilize:

Code: Select all

#define STM32_NO_INIT                       FALSE
#define STM32_PVD_ENABLE                    FALSE
#define STM32_PLS                           STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE                 FALSE
#define STM32_HSI_ENABLED                   TRUE
#define STM32_LSI_ENABLED                   TRUE
#define STM32_HSE_ENABLED                   TRUE
#define STM32_LSE_ENABLED                   FALSE
#define STM32_CLOCK48_REQUIRED              TRUE
#define STM32_SW                            STM32_SW_PLL
#define STM32_PLLSRC                        STM32_PLLSRC_HSE
#define STM32_PLLM_VALUE                    8
#define STM32_PLLN_VALUE                    200
#define STM32_PLLP_VALUE                    4
#define STM32_PLLQ_VALUE                    9
#define STM32_PLLR_VALUE                    4

Can you point me to a sane config for using an 8MHz external oscillator?

Edit: I think i found the issue, I had STM32_HSE_BYPASS defined...

thank you

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