DMA fifo usage inconsistent among stm32 drivers

[faisal]

Most drivers do not use the DMA FIFO, some do: SDIOv1, SDMMCv1, CRYPv1, QUADSPIv2 . Is there any logic behind why some enable it and others don't?

Recently had an issue where we were getting dma errors while using external SRAM, and SPI DMA with that external SRAM. Enabling DMA FIFO solved the problem.

It makes sense to enable DMA FIFO for all LLD drivers, ya?