Chibios on PIC32MX2xx

[etmatrix]

Hi Dmytro,

I trying MIPS32 port (latest) on PIC32MX250F128B. Family 3xx/4xx/5xx has a few differences compared to the 1xx/2xx, for example the register AD1PCFG for set digital/analog I/O is not present, but there are ANSELA and ANSELB.
In file os/hal/platforms/MIPS-PIC32MX/pal_lld.c in the function _pal_lld_setgroupmode the register AD1PCFG is used, I will try to patch it, so also families 1xx/2xx are supported.
For a simple test I have removed the lines with AD1PCFGSET and all compile without problems, I need to update linker script before test on the "road".
I will keep you updated.

[etmatrix]

I attached my linkers script they should be correct, but my demo application (USB-CDC) don't run on my PIC32MX

[Dmytro]

Hi etmatrix,
thank for testing the port and sharing the LD scripts. I'll try to make a basic template for the linker scripts and make the demo define only some offsets and sizes.

Code: Select all

I attached my linkers script they should be correct, but my demo application (USB-CDC) don't run on my PIC32MX

What do you mean? The device is completely dead? Or just USB is not working?
thanks,
~ dmytro

[Dmytro]

I trying MIPS32 port (latest) on PIC32MX250F128B. Family 3xx/4xx/5xx has a few differences compared to the 1xx/2xx, for example the register AD1PCFG for set digital/analog I/O is not present, but there are ANSELA and ANSELB.

There's always a mess around analog inputs in PIC MCUs. Can you share the patch?

[etmatrix]

Hi Dmytro,

thank you your reply

What do you mean? The device is completely dead? Or just USB is not working?

Dead, also a simple palSetPadMode is not working, maybe the linker script is wrong. I need to understand how to improve my debug with my pickit3.

There's always a mess around analog inputs in PIC MCUs. Can you share the patch?

For the moment is a simple patch only for compilation.

Code: Select all

diff --git a/os/hal/platforms/MIPS-PIC32MX/pal_lld.c b/os/hal/platforms/MIPS-PIC32MX/pal_lld.c
index f345e14..2d6492d 100644
--- a/os/hal/platforms/MIPS-PIC32MX/pal_lld.c
+++ b/os/hal/platforms/MIPS-PIC32MX/pal_lld.c
@@ -75,15 +75,21 @@ void _pal_lld_setgroupmode(ioportid_t port, ioportmask_t mask, iomode_t mode) {
     case PAL_MODE_OUTPUT_OPENDRAIN:
       port->odc.set = mask;
     case PAL_MODE_OUTPUT:
+      #if defined(AD1PCFGSET)
       AD1PCFGSET = mask;
+      #endif
       port->tris.clear = mask;
       break;
     case PAL_MODE_INPUT:
+      #if defined(AD1PCFGSET)
       AD1PCFGSET = mask;
+      #endif
       port->tris.set = mask;
       break;
     case PAL_MODE_INPUT_ANALOG:
+      #if defined(AD1PCFGSET)
       AD1PCFGCLR = mask;
+      #endif
       port->tris.set = mask;
       break;
   }


I would like to implement this property in struct PicReg, maybe for 1xx/2xx with ANSELA and ANSELB should be easy, I don't know for 5xx/6xx/7xx.

[Dmytro]

Did you check devcfg registers? The configuration might be incorrect for your device. The configuration bits seems to be compatible between 2xx and 7xx.
Also did you set correctly the frequency of the core in mcuconf? Also on 1xx/2xx shadow registers are not present.

[etmatrix]

Sorry for the delay and for missing informations.
I maked a new board where I set this DEVCFG:

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PIC32MX_DEVCFG0(0x7FFFFFFB);
PIC32MX_DEVCFG1(0xFF600EDB);
PIC32MX_DEVCFG2(0xFFF97CDC);
PIC32MX_DEVCFG3(0x3FFFFFFF);


This configuration is working with a simple firmware with USB CDC. But I have a problem when the hex is generated, some bits is not set correctly. So I change the result .hex with a text editor, after this operation with MPLAB IPE in adavanced mode I check if all DEVCFG are correct. All is ok, I wrote the hex, verify is ok, but when I try to read I got a failed. I can't read the flash memory, after an erase I can read. Maybe some bits protect the flash. This happen only when I wrote this hex, with other hex I can read always.

In mcuconf.h MIPS_CPU_FREQ is 40000000UL.

In Makefile I changed also
HEX = $(CP) -O ihex --change-addresses=0x80000000 --change-section-address .boot=0x1FC00000 --change-section-address .devcfg=0x1FC02FF0
in
HEX = $(CP) -O ihex --change-addresses=0x80000000 --change-section-address .boot=0x1FC00000 --change-section-address .devcfg=0x1FC00BF0

so devcfg is correct
but doesn't work.
After your post I tried to remove the #define MIPS_USE_SHADOW_GPR in mcuconf.h, but doesn't work.

Thank you

[Dmytro]

Hi,
did you try to use .elf instead of .hex?

[etmatrix]

I tried to import elf in MPLabX, but DEVCFG is always wrong.

Defined in source C -> Get from elf/hex
DEVCFG0 0x7FFFFFFB -> 0x6EF00FFF
DEVCFG1 0xFF600EDB -> 0xFF60CDDB
DEVCFG2 0xFFF97CDC -> 0xFFF9FCDC
DEVCFG3 0x3FFFFFFF -> 0x38FFFFFF

maybe also in program memory some bit is not correct. So my manual changes to DEVCFG were useless.

[Dmytro]

That's weird. I was looking for some device with your chip but can't find any. The closest I could find is one with PIC32MX220. I'm going to purchase it to do the integration.