Chibios on PIC32MX2xx

[Dmytro]

Thanks etmatrix, I pushed your correction. Also correct setting of analog cfg in PAL for your 1xx/2xx. I thought that the meaning of the bits are same as for more recent chips in adpcfg but it's inverted. I don't understand how it worked for you ...

[etmatrix]

Bit OSCIOFNC in DEVCFG1 is inverted. I think there is a bug also in 7xx.
With this patch is ok.

Code: Select all

diff --git a/os/hal/platforms/MIPS-PIC32MX/hal_lld.h b/os/hal/platforms/MIPS-PIC32MX/hal_lld.h
index 696527a..5363975 100644
--- a/os/hal/platforms/MIPS-PIC32MX/hal_lld.h
+++ b/os/hal/platforms/MIPS-PIC32MX/hal_lld.h
@@ -94,7 +94,7 @@
  || defined(PIC32MX5XX) || defined(PIC32MX6XX) || defined(PIC32MX7XX)
 #define DEVCFG1_UNIMPLEMENTED   0xFF600858
 #define DEVCFG1_DEFAULT         0x00000000
-#define DEVCFG1_INVERTED        0x0000C300
+#define DEVCFG1_INVERTED        0x0000C700

 /* Oscillator selection */
 #define DEVCFG1_FNOSC_FRC       0x00000000 /* Fast RC */


I thought that the meaning of the bits are same as for more recent chips in adpcfg but it's inverted. I don't understand how it worked for you ...

I don't know, maybe ANSELA = 0 and ANSELB = 0 in main function help me. I will test your new changes tomorrow.

[Dmytro]

You are right, maybe I was looking at a wrong spec by the time I was writing this because for 3xx/4xx it's non-inverted but for others it is inverted. It's a mess =/.
Thanks for pointing this out. I pushed this.

[etmatrix]

I thought that the meaning of the bits are same as for more recent chips in adpcfg but it's inverted. I don't understand how it worked for you ...

I tested last patch and all works well.
In my simple test project, no direct refence to PIC32MX registers exist.
I tried to enable the define MIPS_USE_SHADOW_GPR, compilation is ok, but run doesn't work. Is it possibile to insert an error in compilation when shadow registers aren't exist?

Thank you

[Dmytro]

Great! First successful story for pic32 port.
Thank you for trying it.