Hi there, sorry for the silence - too tough start of the year at work.
So, I've pushed few updates to the mips branch. Major are PAL and SPI llds. The demo is updated to read fatfs from mmc/spi that could be found on olimex's board.
Few updates to other subsystems but nothing very special.
Pito, can you share the tools and data you used to draw these fancy charts? I would like to rerun the tests with non-devel configuration. I suppose that the tests on other MCUs were w/o debug assertions and checks.
All the checks are enabled in MIPS demo which may explain some low numbers.
Anyway, I would also like to do a kind of optimization when you can put some code(ISRs and vectors for instance) into RAM and after to run a benchmark with the tools/data you used to have a kind of uniform comparison.
cheers,
-- dmytro
MIPS32 port
Re: MIPS32 port
Thanks a lot, Pito.
I'm going to start with USB first and then will jump onto profiling.
-- dmytro
I'm going to start with USB first and then will jump onto profiling.
-- dmytro
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Re: MIPS32 port
Hi Dmytro,
I am going to create subforums for the supported architectures, you are doing a good job with this one, do you think a dedicated forum would be useful?
Giovanni
I am going to create subforums for the supported architectures, you are doing a good job with this one, do you think a dedicated forum would be useful?
Giovanni
Re: MIPS32 port
At this point, I'd like to just leave my word: I've never used a MIPS myself. However, I did keep a bit of track about this thread and I can just agree with Giovanni; Dmytro, you're doing a great job.
Thank you very much for contributing
~ Tectu
Thank you very much for contributing
~ Tectu
Re: MIPS32 port
Hi guys,
thanks a lot for the compliments =). I'm enjoying this so far and hope to maintain this attitude for a quite a long time.
I don't know whether it makes sense to have a dedicated forum per architecture as some questions may likely arise on topics related to the platform(boards or peripherals) rather then on the architecture itself.
Maybe it's worth to have a tree like structure where you have one subforum for the architecture itself and subforums per supported platform: MIPS->{[MIPS32], PIC32}, ARM->{[ARM], AT91, LPC, STM}, AVR{[AVR8], ATMega, AT90}
-- dmytro
thanks a lot for the compliments =). I'm enjoying this so far and hope to maintain this attitude for a quite a long time.
I don't know whether it makes sense to have a dedicated forum per architecture as some questions may likely arise on topics related to the platform(boards or peripherals) rather then on the architecture itself.
Maybe it's worth to have a tree like structure where you have one subforum for the architecture itself and subforums per supported platform: MIPS->{[MIPS32], PIC32}, ARM->{[ARM], AT91, LPC, STM}, AVR{[AVR8], ATMega, AT90}
-- dmytro
Re: MIPS32 port
I've not personally used MIPS32 either (other than my Broadcom-based routers), but I would love to give it a shot with ChibiOS/RT. Thanks for the work on this.
Re: MIPS32 port
Hi,
I've pushed USB lld. It was tricky with microchips' USB hw especially w/o the USB analyzer. I have one at work, but I'm so lazy to go the office over the weekend .
Currently only device mode is supported and I believe it's still buggy.
However I was able to connect to ACM shell and run few tests.
Next in the pipe: ram functions and after maybe either generic DMA engine + integration into SPI lld or just DMA support in SPI module.
I've pushed USB lld. It was tricky with microchips' USB hw especially w/o the USB analyzer. I have one at work, but I'm so lazy to go the office over the weekend .
Currently only device mode is supported and I believe it's still buggy.
However I was able to connect to ACM shell and run few tests.
Next in the pipe: ram functions and after maybe either generic DMA engine + integration into SPI lld or just DMA support in SPI module.
Re: MIPS32 port
It appears that pic32 can't execute the code from RAM w/o memory partitioning.
There's a big waste of space because there are limitation in microchip's implementation of this mechanism.
The biggest cons is that data region is limited to less then 64KiB. For devices with 128KiB of SRAM that's a big waste.
I'll continue to experiment, but I don't really like to put such constraints into the port.
There's a big waste of space because there are limitation in microchip's implementation of this mechanism.
The biggest cons is that data region is limited to less then 64KiB. For devices with 128KiB of SRAM that's a big waste.
I'll continue to experiment, but I don't really like to put such constraints into the port.
Re: MIPS32 port
fyi - we use in retrobsd:
96kB user executable ram (we can run programs up to 96kB in size - text+data+stack), 128KB - BMXDUPBA = 96kB
0kB user data ram, BMXDUPBA - BMXDUDBA = 0
32kB kernel ram, BMXDKPBA=32kB
no kernel executable ram, BMXDUDBA=BMXDKPBA
PS: we have got a smallC compiler running in the user ram..
96kB user executable ram (we can run programs up to 96kB in size - text+data+stack), 128KB - BMXDUPBA = 96kB
0kB user data ram, BMXDUPBA - BMXDUDBA = 0
32kB kernel ram, BMXDKPBA=32kB
no kernel executable ram, BMXDUDBA=BMXDKPBA
PS: we have got a smallC compiler running in the user ram..
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