Mailbox from timer interrupt

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svenssonjoel
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Mailbox from timer interrupt

Postby svenssonjoel » Wed Jun 16, 2021 8:59 pm

Hello all,

I hope you are well.

I have been setting up some custom configuration of TIM5 (not quite a GPT and not a PWM) and issue an interrupt that I implement like this:

Code: Select all

OSAL_IRQ_HANDLER(STM32_TIM5_HANDLER) {
  OSAL_IRQ_PROLOGUE();
 
  uint32_t sr = tim5->SR;
  sr &= tim5->DIER & STM32_TIM_DIER_IRQ_MASK;
  tim5->SR = ~sr; 

  uint32_t t;
  t = tim5->CNT;
 
  chMBPostI(&mb, t);
 
  OSAL_IRQ_EPILOGUE();
}


This locks up the whole system when trying to post mail in the mailbox. What am I missing? I made an experiment where instead of sending a mail I toggle a lead on and off at each interrupt (palWritePad) and that seems fine.

I declare the mailbox like this:

Code: Select all

msg_t box_contents[MAX_MESSAGES]; /* mailbox storage */
MAILBOX_DECL(mb, box_contents, MAX_MESSAGES);


Would love some hints if anyone has some ;)

Thanks a lot and have a great day!

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Giovanni
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Re: Mailbox from timer interrupt

Postby Giovanni » Wed Jun 16, 2021 9:26 pm

Hi,

You need to add osalSysLockFromISR() and osalSysUnockFromISR() around I-class functions in ISRs. Enable the state checker in chconf.h, it detects all this kind of errors (by halting with a pointer to an error message).

You may read about function classes in "kernel concepts" section of the RT manual.

Giovanni

svenssonjoel
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Re: Mailbox from timer interrupt

Postby svenssonjoel » Wed Jun 16, 2021 10:38 pm

Thanks a lot!

I suspected something like that. Unfortunately it didn't fix it in this case. I must be doing something strange.

Here's the new code.

Code: Select all

OSAL_IRQ_HANDLER(STM32_TIM5_HANDLER) {
  OSAL_IRQ_PROLOGUE();
 
  uint32_t sr = tim5->SR;
  sr &= tim5->DIER & STM32_TIM_DIER_IRQ_MASK;
  tim5->SR = ~sr; 

  uint32_t t;
  t = tim5->CNT;

  osalSysLockFromISR();
  msg_t msg_val = chMBPostI(&mb, t);
  osalSysUnlockFromISR();
 
  OSAL_IRQ_EPILOGUE();
}


I also enabled the state checker but the only end state string I am able to get to using GDB is "exit".

This is the code I use to enable TIM5 interrupt in the nvic and to configure the timer. I don't know if it is relevant.

Code: Select all

void setup_timer(void) {

 
  rccEnableTIM5(true);
  rccResetTIM5();
 
  nvicEnableVector(STM32_TIM5_NUMBER, STM32_GPT_TIM5_IRQ_PRIORITY); /* use GPT level prio */
 
  tim5 = STM32_TIM5;  /* gives direct access to the tim5 registers */

  tim5->PSC = 0xFFFF;     // counter rate is input_clock / (0xFFFF+1)
  tim5->ARR = 0xFFFFFFFF; // Value when counter should flip to zero.

  tim5->CCR[0] = 0xFFFFFFFF; /* init compare values */
  tim5->CCR[1] = 0xFFFFFFFF;
  tim5->CCR[2] = 0xFFFFFFFF;
  tim5->CCR[3] = 0xFFFFFFFF;

  tim5->CCER |= 0x1; /* activate compare on ccr channel 1 */
  tim5->DIER |= 0x2;
 
  tim5->CNT = 0;
  tim5->EGR = 0x1; // Update event (Makes all the configurations stick)
  tim5->CR1 = 0x1; // enable

}




Thanks again and be well!

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Giovanni
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Re: Mailbox from timer interrupt

Postby Giovanni » Thu Jun 17, 2021 6:59 am

Is the OS initialized in your main() ?

Giovanni

svenssonjoel
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Re: Mailbox from timer interrupt

Postby svenssonjoel » Thu Jun 17, 2021 8:16 am

Good morning

Well, I do halInit followed by chSysInit. thats all.

svenssonjoel
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Re: Mailbox from timer interrupt

Postby svenssonjoel » Thu Jun 17, 2021 8:39 am

I'm so sorry.

The thread that receives on the mailbox is the culprit. Most embarrasing :/
The interrupt stuff and sending on mailbox seems to be perfectly fine now.

Very sorry about this.


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