SPI problem with Chibios 21.11

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Stephane
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SPI problem with Chibios 21.11

Postby Stephane » Wed Jan 12, 2022 5:27 pm

Hello,

I'm migrating some projects from old Chibios versions to Chibios 21.11.

And i'm facing a problem with SPI2 on a STM32F373. (on a custom board)
This SPI bus is used to connect an SD card.

It is working fine under Chibios 20.3 and below, but with Chibios 21.11, when i mount the card, i obtain an error from fatsfs: "FR_NOT_READY".

Connecting a logic analyzer, i see some activity on the SPI2 bus. Mainly on the outputs of the uC.
I think its the sd reset (128 clocks without the Chip Select) followed by the first command (0x40 00 00 00) then something i have to identify.
But the Sd card only put its line low longer after the command... (it doesn't understand the uC ?)
I see one visible difference: with version 21.11, the SPI Serial Clock is idle at high. (3.3V)
While with version 20.3, the Clock idle state is low.

Checking my SPIConfig: ok: it is not activating CPOL.
Using breakpoint i checked the CPOL bit on CR1 of SPI2, and it seems good at 0.

I also see that from this version, the driver for the STM32F373 moved from SPIv2 to SPIv2_v2.

And unfortunately i did not found an example using this new driver on the testhal folder.

Any ideas or common problems ?

Thanks in advance,

Stephane

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Giovanni
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Re: SPI problem with Chibios 21.11

Postby Giovanni » Wed Jan 12, 2022 6:36 pm

Hi,

I haven't tested the SPI_v2 driver with SD cards, it should be compatible with the old driver at API level. Is the SPI clock exactly the same? mcuconf.h probably changed.

Giovanni

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Re: SPI problem with Chibios 21.11

Postby Giovanni » Thu Jan 13, 2022 8:45 am

Please also check the SPI configuration structure, it is a bit different now, make sure to initialize fields by name not by position.

Giovanni

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Re: SPI problem with Chibios 21.11

Postby Stephane » Thu Jan 13, 2022 3:46 pm

Hi,

Thank a lot for your ideas.

Yes, mcuconf.h is the same as the ones on the testhal examples. (except for the specific values for my board)
I also saw that its better to configure the SPIconfig structure using .variable notation.(i had to search a little bit)
The clock was simply idle High instead Off. By decoding the first bytes, i obtained MOSI at 0xa0 00 00 00 00 4a instead 0x40 00 00 00 00 95. It was shifted by one clock because of the wrong idle state. Then the SD was not understanding the command.

But i solved my problem. :P
On board.cfg (then board.h) the SPI2_NSS line was configured with a pullup. (since always)
Changing this value to pulldown solved my problem.

I presume that Chibios versions 20.3 and older were actively putting the Clock to its idle state depending on CPOL.
While the 21.11 that uses the new driver is leaving the bus floating at idle states. Thus the Clock idle state depends of the pullup/pulldown configuration.
Then it explains why the behavior is not the same between the versions.

Have a nice day !

Stéphane


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