I have solved my problem. Actually the problem is due to non halted target. I have issued an halt editing the configuration file "target\klx.cfg"
Code: Select all
#
# Freescale Kinetis KL series devices
#
source [find target/swj-dp.tcl]
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME klx
}
# Work-area is a space in RAM used for flash programming
# By default use 4kB
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
set _WORKAREASIZE 0x1000
}
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x0bc11477
}
swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu
# It is important that "kinetis mdm check_security" is called for
# 'examine-end' event and not 'eximine-start'. Calling it in 'examine-start'
# causes "kinetis mdm check_security" to fail the first time openocd
# calls it when it tries to connect after the CPU has been power-cycled.
$_CHIPNAME.cpu configure -event examine-end {
kinetis mdm check_security
}
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME kinetis 0 0 0 0 $_TARGETNAME
# Table 5-1. Clock Summary of KL25 Sub-Family Reference Manual
# specifies up to 1MHz for VLPR mode.
adapter_khz 1000
$_TARGETNAME configure -event gdb-attach {
halt
}
reset_config srst_nogate
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
cortex_m reset_config sysresetreq
}
$_TARGETNAME configure -event reset-init {
# Table 5-1. Clock Summary of KL25 Sub-Family Reference Manual
# specifies up to 24MHz for run mode; Table 17 of Sub-Family Data
# Sheet rev4 lists 25MHz as the maximum frequency.
adapter_khz 24000
}
I have configured the event gdb-attach
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$_TARGETNAME configure -event gdb-attach {
halt
}
Now debugger works correctly.
Anyway I found out another issue!
OpenOCD loses target control right after a the flash and run if optimization are enabled.
This is due to a wrong configuration of the memory section named ".cfmconfig" (flash memory from 0x0000_0400 to 0x0000_0410).
Opening ports/KINETIS/KL2x/hal_lld.c you can see that a configuration is attempted
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/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
#ifdef __CC_ARM
__attribute__ ((section(".ARM.__at_0x400")))
#else
__attribute__ ((section(".cfmconfig")))
#endif
const uint8_t _cfm[0x10] = {
0xFF, /* NV_BACKKEY3: KEY=0xFF */
0xFF, /* NV_BACKKEY2: KEY=0xFF */
0xFF, /* NV_BACKKEY1: KEY=0xFF */
0xFF, /* NV_BACKKEY0: KEY=0xFF */
0xFF, /* NV_BACKKEY7: KEY=0xFF */
0xFF, /* NV_BACKKEY6: KEY=0xFF */
0xFF, /* NV_BACKKEY5: KEY=0xFF */
0xFF, /* NV_BACKKEY4: KEY=0xFF */
0xFF, /* NV_FPROT3: PROT=0xFF */
0xFF, /* NV_FPROT2: PROT=0xFF */
0xFF, /* NV_FPROT1: PROT=0xFF */
0xFF, /* NV_FPROT0: PROT=0xFF */
0x7E, /* NV_FSEC: KEYEN=1,MEEN=3,FSLACC=3,SEC=2 */
0xFF, /* NV_FOPT: ??=1,??=1,FAST_INIT=1,LPBOOT1=1,RESET_PIN_CFG=1,
NMI_DIS=1,EZPORT_DIS=1,LPBOOT0=1 */
0xFF,
0xFF
};
Anyway without a volatile this is ignored when optimization are enabled. I have solved this problem editing hal_lld.h
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/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
#ifdef __CC_ARM
volatile __attribute__ ((section(".ARM.__at_0x400")))
#else
volatile __attribute__ ((section(".cfmconfig")))
#endif
const uint8_t _cfm[0x10] = {
0xFF, /* NV_BACKKEY3: KEY=0xFF */
0xFF, /* NV_BACKKEY2: KEY=0xFF */
0xFF, /* NV_BACKKEY1: KEY=0xFF */
0xFF, /* NV_BACKKEY0: KEY=0xFF */
0xFF, /* NV_BACKKEY7: KEY=0xFF */
0xFF, /* NV_BACKKEY6: KEY=0xFF */
0xFF, /* NV_BACKKEY5: KEY=0xFF */
0xFF, /* NV_BACKKEY4: KEY=0xFF */
0xFF, /* NV_FPROT3: PROT=0xFF */
0xFF, /* NV_FPROT2: PROT=0xFF */
0xFF, /* NV_FPROT1: PROT=0xFF */
0xFF, /* NV_FPROT0: PROT=0xFF */
0x7E, /* NV_FSEC: KEYEN=1,MEEN=3,FSLACC=3,SEC=2 */
0xFF, /* NV_FOPT: ??=1,??=1,FAST_INIT=1,LPBOOT1=1,RESET_PIN_CFG=1,
NMI_DIS=1,EZPORT_DIS=1,LPBOOT0=1 */
0xFF,
0xFF
};
Ciao,
RM