Hi Giovanni,
- mcuconf updater added (please check it)
- updated some demo file mcuconf to remove WB55 unsupported items
- updated copyright notices in testhal/STM32/multi/
- for board files generator creation...
I don't use the generator normally so not up to speed on the details of its structure.
I just need key points from you on the process to create the new generator and I'll get it done.
--
Bob
STM32WB55 support
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Re: STM32WB55 support
Hi Giovanni,
1. Board Generators
Still working on board generator updates in between other stuff
2. About RCCv1 and WB55
I'm working through the CPU2 stuff and looking at the requirements for migrating the hal_lld to use RCCv1.
One thing that came up immediately is that according to RM0434 Rev 6 PLLSAI1 in the WB55 has a different VCO output frequency range to the main PLL.
So for correct verification of PLLSAI1 there should really be separate STM32_PLLSAI1VCO_MAX and STM32_PLLSAI1VCO_MIN defines used in checks.
In this case MAX is the same but if those defines exist they would be used in in RCCv1/stm32_pllsai1.inc checks instead of STM32_PLLVCO.
Suggested updated pllsai1.inc to deal with VCO limits attached.
However the WB55 differences also extend to PLLSAI1N_VALUE which can be 4 and so below the limit currently used in stm32_pllsai1.inc.
Plenty more to do...
--
Bob
1. Board Generators
Still working on board generator updates in between other stuff
2. About RCCv1 and WB55
I'm working through the CPU2 stuff and looking at the requirements for migrating the hal_lld to use RCCv1.
One thing that came up immediately is that according to RM0434 Rev 6 PLLSAI1 in the WB55 has a different VCO output frequency range to the main PLL.
Bits 14:8 PLLN[6:0]: Main PLL multiplication factor for VCO
...
VCO output frequency = VCO input frequency x PLLN with 6 ≤ PLLN ≤ 127
Caution: The software has to set correctly these bits to assure that the VCO output
frequency is between 96 and 344 MHz.
Bits 14:8 PLLN[6:0]: Audio PLLSAI1 multiplication factor for VCO
...
VCO output frequency = VCO input frequency x PLLN with 4 ≤ PLLN ≤ 86
Caution: The software has to set correctly these bits to ensure that the VCO output
frequency is between 64 and 344 MHz.
So for correct verification of PLLSAI1 there should really be separate STM32_PLLSAI1VCO_MAX and STM32_PLLSAI1VCO_MIN defines used in checks.
In this case MAX is the same but if those defines exist they would be used in in RCCv1/stm32_pllsai1.inc checks instead of STM32_PLLVCO.
Suggested updated pllsai1.inc to deal with VCO limits attached.
However the WB55 differences also extend to PLLSAI1N_VALUE which can be 4 and so below the limit currently used in stm32_pllsai1.inc.
Plenty more to do...
--
Bob
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-
- pllsail.inc.zip
- (1.97 KiB) Downloaded 154 times
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Re: STM32WB55 support
Hi,
I think that STM32WBxx should use GPIOv2, not GPIOv3, it does not have the ASCR register in GPIO. It is like the L4+ not L4.
Bob, the same problem is also in board generator files, it assumes GPIOv3 (but the work looks correct except for this detail).
Giovanni
I think that STM32WBxx should use GPIOv2, not GPIOv3, it does not have the ASCR register in GPIO. It is like the L4+ not L4.
Bob, the same problem is also in board generator files, it assumes GPIOv3 (but the work looks correct except for this detail).
Giovanni
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Re: STM32WB55 support
Hi Giovanni,
1. STM32WB55 GPIO
Changed board generator schema to gpiov2.
Changed platform.mk to GPIOv2
2. STM32L4+
L4+ has no specific generator
It is currently covered by L4xx which means it is using gpio3 in generator.
It also uses GPOIv3 in platform.mk
So should L4+ get its own setup distinct from L4xx?
--
Bob
1. STM32WB55 GPIO
Changed board generator schema to gpiov2.
Changed platform.mk to GPIOv2
2. STM32L4+
L4+ has no specific generator
It is currently covered by L4xx which means it is using gpio3 in generator.
It also uses GPOIv3 in platform.mk
So should L4+ get its own setup distinct from L4xx?
--
Bob
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Re: STM32WB55 support
FXCoder wrote:2. STM32L4+
L4+ has no specific generator
It is currently covered by L4xx which means it is using gpio3 in generator.
It also uses GPOIv3 in platform.mk
So should L4+ get its own setup distinct from L4xx?
--
Bob
Good point, probably yes. That ASCR register appeared on the L476 and then disappeared again on all successive devices, including all other L4s, it is like they tried that approach and then decided it was not worth to keep it (size? extra problems? not getting the power savings they expected? not sure).
It creates a problem because the first L4 have this GPIOv3, all the others have GPIOv2 but are using GPIOv3. Probably the best approach would be to make it all GPIOv2 and have L476 not use ASCR at all.
Giovanni
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Re: STM32WB55 support
Hi Giovanni and Bob,
I've found that with the recent changes demos and tests are not compilable anymore. I attached the following fixes and additional changes in the tarball for the review:
Best regards,
Ilya.
I've found that with the recent changes demos and tests are not compilable anymore. I attached the following fixes and additional changes in the tarball for the review:
- Removed unused STM32_CLOCK_HAS_HSI4 for STM32WB which was previously copy-pasted from L4xx.
- Completed renaming from STM32WB Nucleao64 to Nucleo68 and fixed typos in build paths for testhal multi tests.
- Removed ASCR from the STM32WB board template file including several fixes and also regenerated board files. Specifically speaking, removed LED_RED from GPIOB/14, TIM17_CH1 from GPIOA/9 and disabled configured ports from GPIOG.
- Updated copyrights.
Best regards,
Ilya.
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- STM32WB55xx-2949bd.zip
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Re: STM32WB55 support
Hi Ilya,
Patches applied to trunk.
I noticed that USB_CDC Makefile also needs update to reflect change to nucleo68 from nucleo64.
I made the edit but there is an error when I try to commit the edited Makefile.
Giovanni,
Can you take a look at this?
Thanks
--
Bob
Patches applied to trunk.
I noticed that USB_CDC Makefile also needs update to reflect change to nucleo68 from nucleo64.
I made the edit but there is an error when I try to commit the edited Makefile.
Giovanni,
Can you take a look at this?
Thanks
--
Bob
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Re: STM32WB55 support
Bob,
Thank you for noticing absence of corresponding changes for USB_CDC. I'm currently working on this test for STM32WB and have local changes which didn't go to those patches alongside with the renaming and copyrights. I don't mind if you update USB_CDC because my local changes are not yet ready for review.
Best regards,
Ilya.
Thank you for noticing absence of corresponding changes for USB_CDC. I'm currently working on this test for STM32WB and have local changes which didn't go to those patches alongside with the renaming and copyrights. I don't mind if you update USB_CDC because my local changes are not yet ready for review.
Best regards,
Ilya.
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