You can generate a patch directly from github:
https://github.com/ChibiOS/ChibiOS/comp ... dcan.patch
[DEV] STM32G4xx support
Re: [DEV] STM32G4xx support
mobyfab wrote:You can generate a patch directly from github:
https://github.com/ChibiOS/ChibiOS/comp ... dcan.patch
TIL, thanks!
Re: [DEV] STM32G4xx support
Hello, I created a thread about a problem I have with the FDCAN driver, and I was advised to ask here.
I've been developping an application on nucleo f303k3 which implements bxCAN. I ported the code to nucleo g431 but I'm not able to get a CAN signal out of the chip (other peripherals work fine). It looks like an init or a config problem, because when I try to send a CAN 2.0 frame I always get a MSG_OK, event when the board is not plugged to a tranceiver. I checked the clocks and they seem ok, (using pll clk1 as input of the peripheral). I checked the pins alternate mode, seems ok too. I noticed that the CANTxFrame struct is different in the FDCAN implementation but it should be retro-compatible from what I've seen.
I tried the patch made by mck1117, it fixes some things in the init but it's behaving in the same way. Maybe that's my config that doesn't work?
I used this
Can anyone help me?
I've been developping an application on nucleo f303k3 which implements bxCAN. I ported the code to nucleo g431 but I'm not able to get a CAN signal out of the chip (other peripherals work fine). It looks like an init or a config problem, because when I try to send a CAN 2.0 frame I always get a MSG_OK, event when the board is not plugged to a tranceiver. I checked the clocks and they seem ok, (using pll clk1 as input of the peripheral). I checked the pins alternate mode, seems ok too. I noticed that the CANTxFrame struct is different in the FDCAN implementation but it should be retro-compatible from what I've seen.
I tried the patch made by mck1117, it fixes some things in the init but it's behaving in the same way. Maybe that's my config that doesn't work?
I used this
Code: Select all
CANConfig const canConfig = {
.DBTP = 0x100C20,
.CCCR = 0,
.TEST = 0,
};
Can anyone help me?
Re: [DEV] STM32G4xx support
Hi, I managed to solve my problem.
For the record, I had to implement a function fdcan_clock_start that restarts the clock before clearing the INIT bit in the CCCR register. This functions clears the CSR bit and waits for the CSA bit to be cleared.
For the record, I had to implement a function fdcan_clock_start that restarts the clock before clearing the INIT bit in the CCCR register. This functions clears the CSR bit and waits for the CSA bit to be cleared.
Re: [DEV] STM32G4xx support
Hey, I'm back with a diff
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- fdcan_fix.zip
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Re: [DEV] STM32G4xx support
Apache wrote:Hey, I'm back with a diff
Hi,
I think I lost track of all changes... does this patch include everything compared to trunk?
Giovanni
Re: [DEV] STM32G4xx support
Giovanni wrote:Good work, could you post a patch here?
mck1117 wrote:Giovanni wrote:I've attached a patch to this post - let me know if that works.
any progress on getting the patch merged?
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Re: [DEV] STM32G4xx support
This thread how has two separate patches, not sure what's the relationship between those.
rusEFI cares about https://github.com/ChibiOS/ChibiOS/comp ... dcan.patch right?
rusEFI cares about https://github.com/ChibiOS/ChibiOS/comp ... dcan.patch right?
http://rusefi.com/ - electronic fuel injection
Re: [DEV] STM32G4xx support
russian wrote:rusEFI cares about https://github.com/ChibiOS/ChibiOS/comp ... dcan.patch right?
correct
Re: [DEV] STM32G4xx support
Apache wrote:Hey, I'm back with a diff
I just had a look at this diff, and it looks like I actually already made all these changes in my branch, except for adding the call to fdcan_clock_start. Do you really need to add that? It works just fine on an H7 (same IP from Bosch) exactly as it is on my fork (https://github.com/mck1117/chibios/tree/h7-fdcan).
Apache wrote: Maybe that's my config that doesn't work?
For one, you need to set both DBTP and NBTP. Be careful: they have different formats.
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