STM32H7 ADCv4 patches Topic is solved

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STM32H7 ADCv4 patches  Topic is solved

Postby piers » Sat Jul 04, 2020 9:10 am

Hi, I'm working on getting fixing/finalizing/testing the ADCv4 peripheral on STM32H7.

The progress is on https://github.com/pierstitus/ChibiOS/commits/adcv4

Things that have been fixed already:
- finishing ADC3 implementation
- making ADC12 dual mode work
- single conversions (with circular=false)
- clock calculation and BOOST register

Things to consider:
- Clock prescaler (PRESC register) is not taken into account for clock calculation and BOOST register. Doesn't seem to give problems, but good to know.
- ADC3 uses BDMA, hence the samples buffer must be in sram4.

There's still an issue with double buffering/half transfer interrupt, but that is something bigger, as it is also in ADCv2/STM32F4. I can post a separate bug report for that, though I just set the buffer depth to 1 to circumvent this issue.

I still want to do some more testing, and I think it would be nice to have these tests available in a structured way.
I often use the testhal projects as a start to try new peripherals, and think it would be useful to have a bit more extensive tests of the different possibilities.
I have tried to improve the multi ADC example (see viewtopic.php?p=38248), but think the ADCv4 deserves its own bit more extensive example, so I'd like to clean up the tests I did already and add them separately in testhal, how do you think about that?

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Re: STM32H7 ADCv4 patches

Postby Giovanni » Sat Jul 04, 2020 11:55 am

Please submit separate patches for each issue, not megapatches, all bugs are traced separately.

Giovanni

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Re: STM32H7 ADCv4 patches

Postby piers » Sat Jul 04, 2020 2:06 pm

Hi Giovanni,
It is separated as different commits, I tried to keep the different things separated that way. Since a lot of them patch the same file and are very connected it was much easier to make them build on top of each other.

Also I've used STM32_ENFORCE_H7_REV_Y instead of STM32_ENFORCE_H7_REV_V.

Can you get the patches from github or do you want to have them attached to the forum?

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Re: STM32H7 ADCv4 patches

Postby Giovanni » Sat Jul 04, 2020 3:28 pm

Please attach everything here.

Giovanni

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Re: STM32H7 ADCv4 patches

Postby Giovanni » Mon Jul 06, 2020 10:39 am

Hi,

Note that now it is called STM32_ENFORCE_H7_REV_XY because it is required for both RevX and RevY.

Giovanni

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Re: STM32H7 ADCv4 patches

Postby piers » Fri Jul 17, 2020 1:23 am

Hi Giovanni,
Finally got around to separate the patches even more cleanly and use STM32_ENFORCE_H7_REV_XY.

There's 10 patches now in the attached zip file:
- ADCv4 dual mode DMA transfer size fix
- ADCv4 add dual mode ADC_CCR_DUAL_ defines
- ADCv4 REV-V ADC_CFGR_RES fixes
- ADCv4 fix ADC clock calculation for STM32H7 REV-V
- ADCv4 configure ADC boost
- ADCv4 fix dual adc mode
- ADCv4 implement ADC3 BDMA setup
- ADCv4 fix DMNGT register typo - Caused problems with single conversions (with circular=false)
- BDMAv1 fix interrupt flags
- ADCv4 add missing channel 19

I tested most combinations of usage, if you want to have a more extensive ADCv4 test/example for in testhal I can clean up what I've got here as a separate test project.
Attachments
ADCv4-patches.zip
(11.44 KiB) Downloaded 52 times

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Re: STM32H7 ADCv4 patches

Postby Giovanni » Fri Jul 24, 2020 10:31 am

Hi,

Good work with all the patches (almost flawless). I had to change a reference to STM32_SYSCLK (undefined) to STM32_HCLK. I hope everything is OK now.

Fixed bug as #1117.

Giovanni

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Re: STM32H7 ADCv4 patches

Postby piers » Wed Jul 29, 2020 11:29 am

Great.

Note that for the BDMA of ADC3 the samples buffer needs to be in ram4. Probably that's not immediately clear for everybody.

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Re: STM32H7 ADCv4 patches

Postby alex31 » Mon Apr 12, 2021 6:25 pm

Hello,

I am trying to use ADC3 working on an H743ZI rev 'V' (newer nucleo board)

for now I am stuck, the dma never fire interrupt for end of transfert so ADCConvert block forever, but the other threads are working fine, no hardfault.

I use sram4 for the samples, have set all the DBG flags in ch.conf and enabled errorcallback (which was useful to show me that I was not using sram4 at first).

Since there is no ADC3 example, i have used ADC1 example and just made the changes to use ADC3 instead ADC1.

any idea, if someone has a minimal ADC3 working example, i am interested :-)

A.

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Re: STM32H7 ADCv4 patches

Postby Giovanni » Mon Apr 12, 2021 6:57 pm

The interrupt should come from DMA, is the ADC actually reading samples in memory?

Anyway, please use the support forum for this kind of things, it is not yet a bug report.

Giovanni


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