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diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld.h b/os/hal/ports/STM32/STM32H7xx/hal_lld.h
index 466c3fdc8..9867fa435 100644
--- a/os/hal/ports/STM32/STM32H7xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32H7xx/hal_lld.h
@@ -2615,7 +2615,7 @@
/**
* @brief LPUART1 clock.
*/
-#define STM32_LPUART1CLK STM32_PCLK1
+#define STM32_LPUART1CLK STM32_PCLK4^M
#elif STM32_LPUART1SEL == STM32_LPUART1SEL_PLL2_Q_CK
#define STM32_LPUART1CLK STM32_PLL2_Q_CK
diff --git a/os/hal/ports/STM32/STM32H7xx/stm32_isr.c b/os/hal/ports/STM32/STM32H7xx/stm32_isr.c
index 97cb7606c..8ed4d72fc 100644
--- a/os/hal/ports/STM32/STM32H7xx/stm32_isr.c
+++ b/os/hal/ports/STM32/STM32H7xx/stm32_isr.c
@@ -141,7 +141,8 @@ void irqInit(void) {
uart5_irq_init();
usart6_irq_init();
uart7_irq_init();
- uart5_irq_init();
+ uart8_irq_init();^M
+ lpuart1_irq_init();^M
}
/**
@@ -190,7 +191,8 @@ void irqDeinit(void) {
uart5_irq_deinit();
usart6_irq_deinit();
uart7_irq_deinit();
- uart5_irq_deinit();
+ uart8_irq_deinit();^M
+ lpuart1_irq_deinit();^M
}
/** @} */
diff --git a/os/hal/ports/STM32/STM32H7xx/stm32_isr.h b/os/hal/ports/STM32/STM32H7xx/stm32_isr.h
index df3c6dc78..e9b776ab2 100644
--- a/os/hal/ports/STM32/STM32H7xx/stm32_isr.h
+++ b/os/hal/ports/STM32/STM32H7xx/stm32_isr.h
@@ -56,6 +56,7 @@
#define STM32_USART6_SUPPRESS_ISR
#define STM32_UART7_SUPPRESS_ISR
#define STM32_UART8_SUPPRESS_ISR
+#define STM32_LPUART1_SUPPRESS_ISR^M
/** @} */
/**
@@ -289,6 +290,7 @@
#define STM32_USART6_HANDLER Vector15C
#define STM32_UART7_HANDLER Vector188
#define STM32_UART8_HANDLER Vector18C
+#define STM32_LPUART1_HANDLER Vector278^M
#define STM32_USART1_NUMBER 37
#define STM32_USART2_NUMBER 38
@@ -298,6 +300,7 @@
#define STM32_USART6_NUMBER 71
#define STM32_UART7_NUMBER 82
#define STM32_UART8_NUMBER 83
+#define STM32_LPUART1_NUMBER 142^M
/*
* USB/OTG units.
diff --git a/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h b/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h
index 6d289d13d..3866c5522 100644
--- a/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h
@@ -1687,6 +1687,29 @@
* @api
*/
#define rccResetUART8() rccResetAPB1L(RCC_APB1LRSTR_UART8RST)
+^M
+/**^M
+ * @brief Enables the LPUART1 peripheral clock.^M
+ *^M
+ * @param[in] lp low power enable flag^M
+ *^M
+ * @api^M
+ */^M
+#define rccEnableLPUART1(lp) rccEnableAPB4(RCC_APB4ENR_LPUART1EN, lp)^M
+^M
+/**^M
+ * @brief Disables the LPUART1 peripheral clock.^M
+ *^M
+ * @api^M
+ */^M
+#define rccDisableLPUART1() rccDisableAPB4(RCC_APB4ENR_LPUART1EN)^M
+^M
+/**^M
+ * @brief Resets the LPUART1 peripheral.^M
+ *^M
+ * @api^M
+ */^M
+#define rccResetLPUART1() rccResetAPB4(RCC_APB4RSTR_LPUART1RST)^M
/** @} */
/**
diff --git a/os/hal/ports/STM32/STM32H7xx/stm32_registry.h b/os/hal/ports/STM32/STM32H7xx/stm32_registry.h
index 9d94200e6..ea879ebba 100644
--- a/os/hal/ports/STM32/STM32H7xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32H7xx/stm32_registry.h
@@ -258,7 +258,7 @@
#define STM32_HAS_USART6 TRUE
#define STM32_HAS_UART7 TRUE
#define STM32_HAS_UART8 TRUE
-#define STM32_HAS_LPUART1 FALSE
+#define STM32_HAS_LPUART1 TRUE^M
/* USB attributes.*/
#define STM32_OTG_STEPPING 2
