[patch] Fix for timer register layout on STM32G4 Topic is solved

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tridge
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[patch] Fix for timer register layout on STM32G4  Topic is solved

Postby tridge » Sat Mar 13, 2021 11:19 pm

The attached patch fixes the register layout in TIMv1 for STM32G4. The key registers that mattered for me are DCR and DMAR, needed for strided burst DMA for sending a DShot signal out a timer. On STM32G4 the DCR register is at 0x3DC whereas on F4/F7/H7 etc it is at 0x48
It took me an embarrassingly long time to work out why DShot wasn't working in the port of ArduPilot to STM32G474 :-)
Cheers, Tridge
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TIMv1-G4.zip
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Re: [patch] Fix for timer register layout on STM32G4

Postby Giovanni » Sun Mar 14, 2021 8:00 am

Hi,

Thanks, I was not aware of those differences...

Moving in bug reports.

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Re: [patch] Fix for timer register layout on STM32G4

Postby FXCoder » Mon Mar 22, 2021 8:25 am

Fixed in trunk as bug #1148.
Backported to 20.3.4
--
Bob


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