QSPIv2 driver issues H757I EVAL Topic is solved

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QSPIv2 driver issues H757I EVAL  Topic is solved

Postby sidbh » Sun May 23, 2021 5:14 pm

I have been trying to interface with MT25Q using QSPIv2. I have send command working perfectly including the MDMA, but I had to make changes to QSPIv2 driver. Firstly, I noticed a clear bug in the following lines of code:

Code: Select all

  uint32_t ccr  = STM32_MDMA_CCR_PL(STM32_WSPI_QUADSPI1_MDMA_PRIORITY) |
                  STM32_MDMA_CCR_CTCIE          |   /* On transfer complete.*/
                  STM32_MDMA_CCR_TCIE;              /* On transfer error.   */


It should be

Code: Select all

STM32_MDMA_CCR_TEIE
instead of

Code: Select all

STM32_MDMA_CCR_TCIE


Secondly, the driver uses MDMA_REQUEST_QUADSPI_TC signal to MDMA for sending the data, which I think is not correct. In the datasheet section 23.3.12 it says
In case of data transmission (FMODE = 00 and DMODE! = 00), the communication start is
triggered by a write in the FIFO through QUADSPI_DR.
so when the send is entered with this condition the transfer would never take place. I believe MDMA_REQUEST_QUADSPI_FIFO_TH is the correct signal, and I tested it to fix the hang while sending where the above mentioned condition is met.

So, at this stage the Data out is working as intended, double checked on Logic Analyser. Now I am stuck at the issue of receiving the data. I can clearly see the instruction being sent on the bus without issue, and the chip responds as expected, and I can see the bytes appearing in the DR register of QSPI and also FLEVEL value being set correctly to show bytes have successfully been received by QSPI peripheral and retained in FIFO. But from here on forth, the copy by MDMA from DR to memory does not take place.I can see the CNBTR value decreasing to 0 from previous set transaction size, but the bytes in the memory are not even being overwritten with some value, tested by setting the buffer with fill value before hand and checking after the transaction is over. I also observed that at the end of the MDMA transaction completion the QSPI has its DR FIFO flushed as well. I can confirm that the memory is located in AXI SRAM (0x24000000) as required, and have tried with both MDMA_REQUEST_QUADSPI_FIFO_TH and MDMA_REQUEST_QUADSPI_TC signals resulting in similar behaviour. Any direction from here onwards to debug the issue will be greatly appreciated.

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Re: QSPIv2 driver issues H757I EVAL

Postby Giovanni » Sun May 23, 2021 6:15 pm

Hi,

Moving this topic in "bug reports".

I don't have a board to test this driver, do you mind posting a patch here if you get it fully working? other QSPI and OSPI drivers are functional so it cannot be entirely broken.

Giovanni

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Re: QSPIv2 driver issues H757I EVAL

Postby sidbh » Sun May 23, 2021 6:19 pm

Hi Giovanni,
I will certainly do that. Any thoughts on tracking down the MDMA issue?

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Re: QSPIv2 driver issues H757I EVAL

Postby Giovanni » Sun May 23, 2021 6:21 pm

Not right now, lets see if others have ideas about this.

Giovanni

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Re: QSPIv2 driver issues H757I EVAL

Postby Giovanni » Sun May 23, 2021 6:38 pm

Hi,

One of our devs apparently has the driver working, he is checking if it is aligned with trunk.

Giovanni

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Re: QSPIv2 driver issues H757I EVAL

Postby sidbh » Sun May 23, 2021 7:18 pm

Great! will be waiting for the sample code.

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Re: QSPIv2 driver issues H757I EVAL

Postby Giovanni » Sun May 23, 2021 8:03 pm

Hi,

About data not being received, is your buffer cacheable? it is possible that the CPU sees data in cache not what DMA has written in RAM.

Giovanni

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Re: QSPIv2 driver issues H757I EVAL

Postby sidbh » Sun May 23, 2021 8:42 pm

Yeah, that fixed the issue, the RAM was set to be cacheable, I just added SCB_CleanInvalidateDCache(); before wspiReceive return to quickly test this. But ofcourse the right way would be to disable the Cache on the region entirely. Additionally Transfer Complete signal to MDMA doesn't work for Receive either, needed to set to FIFO Level Threshold signal for that as well. I will be running the entire WSPI-MFS suite after some cleanup. I will also share my patches later this week. Thanks for your help!

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Re: QSPIv2 driver issues H757I EVAL

Postby sidbh » Wed May 26, 2021 7:49 pm

Hi Giovanni,
Please find the patches for the changes I added below.
patches.zip
(3.76 KiB) Downloaded 128 times


Patch "0002-QSPIv2-set-FCR-to-clear-pending-flags-if-any.patch" is just out of paranoia, I didn't as such notice any issue except when using TC signal, which sometimes remained set when arriving at this line, I didn't dig much into it though. I haven't run entire MFS example yet, but it seemed to at least go through snorMemoryMap and snorMemoryUnmap.

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Re: QSPIv2 driver issues H757I EVAL

Postby Giovanni » Wed May 26, 2021 7:53 pm

Hi,

MFS has a test suite, you may try to run that for validation. See the MFS demo.

Giovanni


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