Wrong checks on STM32_SDMMC_MAXCLK for H7 type1 lld Topic is solved

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andypiper
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Wrong checks on STM32_SDMMC_MAXCLK for H7 type1 lld  Topic is solved

Postby andypiper » Sun Jan 15, 2023 4:10 pm

STM32_SDMMC_MAXCLK is not set in hal_lld_type1.h or hal_lld_type2.h and so defaults to 50Mhz which is way too low.

I suspect the values defined in hal_lld_type3.h are applicable to type1 and type2 as well

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Re: Wrong checks on STM32_SDMMC_MAXCLK for H7 type1 lld

Postby nikiwaibel » Mon Jan 30, 2023 1:43 am

for the STM32H7A3, the maximum is 280Mhz in VOS0.

swappy-20230130_013906.png

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Giovanni
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Re: Wrong checks on STM32_SDMMC_MAXCLK for H7 type1 lld

Postby Giovanni » Sat Mar 04, 2023 10:56 am

Fixed as bug 1254.

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