Inconsistency/clash in using MPU regions Topic is solved

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steved
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Inconsistency/clash in using MPU regions  Topic is solved

Postby steved » Wed Mar 29, 2023 3:05 pm

For the 32H7, STM32_NOCACHE_MPU_REGION and STM32_NOCACHE_ENABLE are defined.

The 32F7 defines STM32_SRAM2_NOCACHE, and hard codes MPU_REGION_7 in hal_lld.c
.....but in chcore.h you have:

Code: Select all

#define PORT_USE_GUARD_MPU_REGION       MPU_REGION_7


As a minimum, I suggest that STM32_NOCACHE_MPU_REGION should be supported for the F7, to avoid the clash of assignments

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Giovanni
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Re: Inconsistency/clash in using MPU regions

Postby Giovanni » Tue Apr 11, 2023 12:49 pm

Yes, it should be similar to the H7 solution, will do this way.

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Re: Inconsistency/clash in using MPU regions

Postby Giovanni » Thu Apr 13, 2023 6:25 pm

Hi,

Committed the change.

Giovanni


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