I just checked out the example under "ChibiOS-RT/demos/ARMCM3-STM32L152-DISCOVERY". The SPI setting of the demo is as the following:
Code: Select all
/*
* SPI configuration structure.
* Maximum speed (12MHz), CPHA=0, CPOL=0, 16bits frames, MSb transmitted first.
* The slave select line is the pin GPIOA_SPI1NSS on the port GPIOA.
*/
static const SPIConfig spicfg = {
spicb,
/* HW dependent part.*/
GPIOB,
12,
SPI_CR1_DFF
};
palSetPad(GPIOB, 12);
palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL |
PAL_STM32_OSPEED_HIGHEST); /* NSS. */
palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) |
PAL_STM32_OSPEED_HIGHEST); /* SCK. */
palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5)); /* MISO. */
palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) |
PAL_STM32_OSPEED_HIGHEST); /* MOSI. */
The comment of "spicfg" points out the maximal speed would be 12MHz. When I read the datasheet, the maximal clock rate of APB2 should be 32MHz, and after the prescaler calculation (000: fclk/2), it should be 32MHz / 2 = 16MHz, instead of 12MHz. Did I misunderstand anything here?
Thanks!
~S
