SPI interrupt with FPU-Thread not working properly

[Nikhil V R]

Hello Forum,
I successfully ported stm32f407 project to stm32f437.Im using STM32 standard library SPI code and when I enabled CORTEX_USE_FPU =TRUE thread execution stops.Can anybody tells why this is happening?When I didnt enabled SPI dma interrupt everything is fine.

When Im enabling SPI interrupt, code keep on runs in _idle_thread.Anything to do with interrupt stack?

[Giovanni]

Hi,

Did you enable FPU in the makefile? CORTEX_USE_FPU=TRUE alone is not sufficient.

Search this in the makefile:

Code: Select all

# Enables the use of FPU on Cortex-M4 (no, softfp, hard).
ifeq ($(USE_FPU),)
  USE_FPU = no
endif

Giovanni

[Nikhil V R]

I'm using Keil IDE for debugging.So do I need to explicitly use make file?I enabled USE FPU in IDE.

[Giovanni]

That should be enough. There must be another cause but without knowing the details is hard to tell.

Start with enabling all the debug options in chconf.h in case you haven't enabled them already. Many common mistakes can be fount that way.

Also, check your ISR priorities if you are using external libraries.

Giovanni

[Nikhil V R]

CH_DBG_SYSTEM_STATE_CHECK = FALSE
CH_DBG_ENABLE_CHECKS = FALSE
rest all other debugging options are true. When i changed CH_DBG_SYSTEM_STATE_CHECK = TRUE code execution hangs inside port_halt.Can you please tell how to find the cause?

[Nikhil V R]

Also given high priority to SPI interrupt.I checked with different priorities.All given the same result

[Giovanni]

All debug options stop the system when an error is found, the fact that the system stops means that there is a an error message pointed by dbg_panic_msg, stop the execution and read the message using the debugger.

If the message is an error code like SV#n, the code "n" gives an hint about the problem, the codes are in the manual, kernel debug section.

Giovanni

[Nikhil V R]

dbg_panic_msg gives error as SV#6, misplaced chSysLockFromIsr().
Is it actually need to call chSysLockFromIsr() inside SPI ISR since SPI is implemented with STM library.

[Nikhil V R]

dbg_panic_msg gives SV#6, misplaced chSysLockFromIsr().
Since SPI ISR is generated from chibios, do I need to give chSysLockFromIsr() inside SPI ISR? Currently Inside all ISR I have given chSysLockFromIsr() and chSysUnlockFromIsr()

[Nikhil V R]

I removed all chSysLockFromIsr() from all ISR which is not part of chibios.Now the error changed to SV#4, misplaced chSysLock().

What I did inside the threads are

while(1) {
chSysLock();
/* thread tasks */
chSysUnlock();
chThdSleepMilliseconds(2);
}

Is this way correct?I thought giving chThdSleepMilliseconds() will help in context switching.