STM32L4 support Topic is solved

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szego
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STM32L4 support

Post by szego »

I'm working on a port for the STM32L4, specifically the Nucleo-L476RG board. I have just enough of the HAL to have created a RT-STM32L476RG-NUCLEO demo, based on the L152 Nucleo demo. It does the usual LED blinking and runs the tests.

I have a lot of questions about the best way to do things to keep things consistent with other ports. What's the best way to do this? Submit a patch for others to critique? Ask (a whole bunch of) individual questions here?

Any advice appreciated.

Paul.

p.s. is anyone else working on an STM32L4 port? I noticed commit #8176 labelled "STM32L4xx startup support".
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Giovanni
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Re: STM32L4 support

Post by Giovanni »

Hi,

L4 is next on the list after F7 support. The best way to have the port quickly included is to follow strictly the pattern of other ports, especially regarding hal_lld.* and stm32_registry.h. The L4 port should be very close to the L1 code but it should be "modernized" using L0 code as example. L0 and F7 ports use new conventions, for example there is no more a separate stm32_isr.h file. DMA and ADC are now centralized.

Anyway, is HW already available? it wasn't last time I checked.

Giovanni
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Re: STM32L4 support

Post by rew »

Both Digikey and Farnell have stock for "next day delivery". (Not sure if Digikey does "Next day").
szego
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Re: STM32L4 support

Post by szego »

We have samples and the L4 Nucleo from our local ST rep.
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Re: STM32L4 support

Post by Giovanni »

I am waiting 2 boards too, L4 support is the next thing that will be implemented, before 3.1.0 release.

Giovanni
szego
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Re: STM32L4 support

Post by szego »

I have some STM32L4 code working, was hoping to either supply it or integrate with any other work that's been done.

Giovanni - is there any progress on the STM32L4 port? Should I post what I have somewhere?

Please let me know what's the best way to proceed here.
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Re: STM32L4 support

Post by Giovanni »

Hi,

It is work in progress, I decided that it is different enough to deserve a redesigned clock tree implementation. Please post what you have here in the forum zipped.

Giovanni
szego
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Re: STM32L4 support

Post by szego »

Here's the diff against #8405, as well as the changed files in full.

I'm not sure about the makefiles, as I don't use them to build.

I based the clock tree on the CubeMX's "Clock Configuration" picture.

Paul.
Attachments
l4-demo-src.zip
Changed source files
(71.56 KiB) Downloaded 492 times
l4-demo.diff.zip
Diff against 8405
(18.12 KiB) Downloaded 499 times
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Re: STM32L4 support

Post by Giovanni »

I committed initial support for STM32L4xx.

The clock tree is quite complex and I wanted to capture all features, so it took a while. It also required a new GPIOv3 driver with support for the pin-lock and the new analog switches features.

The serial driver worked as-is and the test suite executed correctly, performance is really nice thanks to ART.

Code: Select all

*** ChibiOS/RT test suite
***
*** Kernel:       3.1.0
*** Compiled:     Nov 13 2015 - 14:55:34
*** Compiler:     GCC 4.9.3 20150529 (release) [ARM/embedded-4_9-branch revision 227977]
*** Architecture: ARMv7E-M
*** Core Variant: Cortex-M4
*** Port Info:    Advanced kernel mode
*** Platform:     STM32L4xx Ultra Low Power
*** Test Board:   STMicroelectronics NUCLEO-L476RG

----------------------------------------------------------------------------
--- Test Case 1.1 (System, critical zones)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.2 (System, interrupts handling)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.3 (System, integrity)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.1 (Threads, enqueuing test #1)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.2 (Threads, enqueuing test #2)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.3 (Threads, priority change)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.4 (Threads, delays)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.1 (Semaphores, enqueuing)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.2 (Semaphores, timeout)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.3 (Semaphores, atomic signal-wait)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.4 (Binary Semaphores, functionality)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.1 (Mutexes, priority enqueuing test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.2 (Mutexes, priority return)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.3 (Mutexes, status)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.4 (CondVar, signal test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.5 (CondVar, broadcast test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.6 (CondVar, boost test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 5.1 (Messages, loop)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 6.1 (Mailboxes, queuing and timeouts)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 7.1 (Events, registration and dispatch)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 7.2 (Events, wait and broadcast)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 7.3 (Events, timeouts)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 8.1 (Heap, allocation and fragmentation test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 9.1 (Memory Pools, queue/dequeue)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.1 (Dynamic APIs, threads creation from heap)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.2 (Dynamic APIs, threads creation from memory pool)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.3 (Dynamic APIs, registry and references)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.1 (Queues, input queues)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.2 (Queues, output queues)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.1 (Benchmark, messages #1)
--- Score : 390235 msgs/S, 780470 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.2 (Benchmark, messages #2)
--- Score : 311278 msgs/S, 622556 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.3 (Benchmark, messages #3)
--- Score : 311278 msgs/S, 622556 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.4 (Benchmark, context switch)
--- Score : 1252432 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.5 (Benchmark, threads, full cycle)
--- Score : 223459 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.6 (Benchmark, threads, create only)
--- Score : 333327 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.7 (Benchmark, mass reschedule, 5 threads)
--- Score : 99378 reschedules/S, 596268 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.8 (Benchmark, round robin context switching)
--- Score : 780476 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.9 (Benchmark, I/O Queues throughput)
--- Score : 868380 bytes/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.10 (Benchmark, virtual timers set/reset)
--- Score : 730694 timers/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.11 (Benchmark, semaphores wait/signal)
--- Score : 1839064 wait+signal/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.12 (Benchmark, mutexes lock/unlock)
--- Score : 981588 lock+unlock/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 12.13 (Benchmark, RAM footprint)
--- System: 336 bytes
--- Thread: 68 bytes
--- Timer : 20 bytes
--- Semaph: 12 bytes
--- EventS: 4 bytes
--- EventL: 20 bytes
--- Mutex : 16 bytes
--- CondV.: 8 bytes
--- Queue : 36 bytes
--- MailB.: 40 bytes
--- Result: SUCCESS
----------------------------------------------------------------------------

Final result: SUCCESS


The other drivers are to be tested, I already know that a new ADC will be required but others hopefully should work out of the box.

Giovanni
szego
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Re: STM32L4 support

Post by szego »

Got it running, finally. Was chasing your SVN commits for a day, one step behind you.

GPIOv3 works fine for me.
RTC works fine with the latest clock settings (LSE enabled by default)
EXTIv1 needed a few tweaks - the L4 has different register names. Not sure the best way to do this, but I'll add my patch here.
I2Cv1 just added a different clock frequency check (in the patch also)

will keep testing.

Paul.
Attachments
ext_lld_isr.zip
(2.84 KiB) Downloaded 468 times
exti.diff.zip
(1.33 KiB) Downloaded 487 times
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