Hi all,
I'm using a HAL GPT with a callback to generate a pulse train as part of my current project. It's important that the edges of the pulses are as accurately timed as possible, with minimal jitter, so I've raised the appropriate GPT interrupt priority to just below that of the kernel (I'm on STM32). Ideally I'd like to raise it even further so it becomes a 'fast interrupt', but that denies me access to the I-class functions that interact with the timer.
Is there a way I can stop, reload and restart a GPT timer from a fast interrupt in a portable way? I'm aware that I could just drop the HAL and access the timer directly, writing an ISR for it, but I like to use abstraction layers wherever I can for all the same reasons that the layers exist in the first place!
Thanks in advance...
Low-latency HAL timer interrupts
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- Giovanni
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Re: Low-latency HAL timer interrupts
Hi,
Accessing the OS from fast interrupts can be done through a mechanism called delegation. From the fast ISR you can trigger a software interrupt (PendSV for example) running at a lower priority level, from the delegate ISR you can call the OS.
This way you can have a very low jitter state machine running on the fast ISR and delegate the call to OS on some specific state transitions.
Giovanni
Accessing the OS from fast interrupts can be done through a mechanism called delegation. From the fast ISR you can trigger a software interrupt (PendSV for example) running at a lower priority level, from the delegate ISR you can call the OS.
This way you can have a very low jitter state machine running on the fast ISR and delegate the call to OS on some specific state transitions.
Giovanni
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Re: Low-latency HAL timer interrupts
Thanks for your quick reply Giovanni.
Delegation to PendSV is a possibility, but it's effectively platform-dependent isn't it? Unless ChibiOS has a delegation wrapper of which I'm unaware, PendSV is Cortex specific and even software interrupts are not a universal concept. My hope was to find a way to write something in 'plain' ChibiOS to maximise portability.
That said, it's possible that delegation to a high-priority regular task could be practical, given that the periods involved between timer events will be short. I'll have a think.
Thanks again.
Andy
Delegation to PendSV is a possibility, but it's effectively platform-dependent isn't it? Unless ChibiOS has a delegation wrapper of which I'm unaware, PendSV is Cortex specific and even software interrupts are not a universal concept. My hope was to find a way to write something in 'plain' ChibiOS to maximise portability.
That said, it's possible that delegation to a high-priority regular task could be practical, given that the periods involved between timer events will be short. I'll have a think.
Thanks again.
Andy
- Giovanni
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Re: Low-latency HAL timer interrupts
Hi,
True but also fast interrupts are architecture-dependent, the feature is not wrapped in a standard interface. Note that in the NVIC it should be possible to use any IRQ as SW interrupt, I haven't tried it yet because PendSV is available.
Giovanni
True but also fast interrupts are architecture-dependent, the feature is not wrapped in a standard interface. Note that in the NVIC it should be possible to use any IRQ as SW interrupt, I haven't tried it yet because PendSV is available.
Giovanni
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cooperised
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Re: Low-latency HAL timer interrupts
Hi,
Good point about fast interrupts! I like to keep my code neat and portable whenever I can (in any context), but I don't really intend to port this anyway, and delegation is neat, so I'll just shut up and do that.
Andy
Good point about fast interrupts! I like to keep my code neat and portable whenever I can (in any context), but I don't really intend to port this anyway, and delegation is neat, so I'll just shut up and do that.
Andy
- Giovanni
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Re: Low-latency HAL timer interrupts
Yes, abstraction is nice regardless portability, I prefer to use a "standard" way to do things when possible too.
Giovanni
Giovanni