STM32F030C8T6 Clock Issue

[Giovanni]

Last time I checked the F091 demo worked here.

Giovanni

[Tabulous]

Last time I checked the F091 demo worked here.

Giovanni

Well i'm at a lost as to why this is happening and what is the best way to find a solution......

The only thing i can positively say is it dont work on a STM32F030CC device, i dont know what else to add. I know if i disable using PLL and run on HSI at 8Mhz it works

[Giovanni]

Please step in asm mode and see which instruction causes the fault.

Giovanni

[Tabulous]

Please step in asm mode and see which instruction causes the fault.

Giovanni

Code: Select all

08002824:   str r2, [r3, #48]       ; 0x30
08002826:   ldr r3, [pc, #68]       ; (0x800286c <stm32_clock_init+204>)
08002828:   ldr r2, [pc, #64]       ; (0x800286c <stm32_clock_init+204>)
0800282a:   ldr r2, [r2, #0]
0800282c:   movs r1, #128   ; 0x80
0800282e:   lsls r1, r1, #17
08002830:   orrs r2, r1
08002832:   str r2, [r3, #0]

This the sequence, the last instruction is the one that bombs it

[Giovanni]

Now inspect R3 and see if it is a valid address... you may also inspect the location with the memory browser.

Giovanni

[Tabulous]

Now inspect R3 and see if it is a valid address... you may also inspect the location with the memory browser.

Giovanni

See image

[Giovanni]

So it is crashing when writing RCC_CR, I can't imagine any reason for that, unless there is some security mechanism associated to the register.

Is the PLL source correctly initialized? maybe it does not allow starting it if not.

Giovanni

[Giovanni]

"If a failure is detected on the HSE clock, the HSE oscillator is automatically disabled, a clock failure event is sent to the break input of the advanced-control timers (TIM1) and general-purpose timers (TIM15, TIM16 and TIM17) and an interrupt is generated to inform the software about the failure (Clock Security System Interrupt CSSI), allowing the MCU to perform rescue operations. The CSSI is linked to the Cortex®-M0 NMI (Non-Maskable Interrupt) exception vector."

Is it an NMI what you are getting? if so probably the RCC_CFGR register is not initialized correctly and the PLL fails.

Giovanni

[Tabulous]

"If a failure is detected on the HSE clock, the HSE oscillator is automatically disabled, a clock failure event is sent to the break input of the advanced-control timers (TIM1) and general-purpose timers (TIM15, TIM16 and TIM17) and an interrupt is generated to inform the software about the failure (Clock Security System Interrupt CSSI), allowing the MCU to perform rescue operations. The CSSI is linked to the Cortex®-M0 NMI (Non-Maskable Interrupt) exception vector."

Is it an NMI what you are getting? if so probably the RCC_CFGR register is not initialized correctly and the PLL fails.

Giovanni

Ive got all debugging turned on, does the OS have a trap for NMI ? if so where is it

Also im not using the HSE.......

[Giovanni]

Hi,

There is a single exception routine (_unhandled_exception) for all exceptions, you need to declare your own handler, see vectors.c for names.

void name(void) {
}

Alternatively you can inspect the SPR register (Status), the lower bits are the vector number.

Giovanni