STM32L4xx FLASH & memory align

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Max
Posts: 3
Joined: Sun Sep 09, 2012 3:58 pm

STM32L4xx FLASH & memory align

Post by Max »

Hello guys,

I tried to test RT-STM32L476RG-NUCLEO64 demo and to load it with blackmagic Probe but it failed.

Turns out that the issue is a FLASH memory align issue. As per ST's RM0351, writes should be 8-bytes aligned, but ChibiOS's linker aligns the different sections to 4 bytes. In the end, it causes some overwrites and FLASH locks down.

I dirty-fixed the issue with the modifications below, but would it be possible to make something cleaner?
Like inlcuding all sections into a bigger one "flash" and have only one section loaded (that would concatenate all sections taking care of align issues) ?

I understand it's probably a BMP limitation, but maybe other debuggers may have the issue too?

FYI : link to the original issue subject

Code: Select all

diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/rules_code.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/rules_code.ld
index f61fe2d..41e8beb 100644
--- a/os/common/startup/ARMCMx/compilers/GCC/ld/rules_code.ld
+++ b/os/common/startup/ARMCMx/compilers/GCC/ld/rules_code.ld
@@ -44,7 +44,7 @@ SECTIONS
         *(.gcc*)
     } > TEXT_FLASH AT > TEXT_FLASH_LMA
 
-    .rodata : ALIGN(4)
+    .rodata : ALIGN(8)
     {
         . = ALIGN(4);
         __rodata_base__ = .;
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/rules_data.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/rules_data.ld
index c531015..40a4159 100644
--- a/os/common/startup/ARMCMx/compilers/GCC/ld/rules_data.ld
+++ b/os/common/startup/ARMCMx/compilers/GCC/ld/rules_data.ld
@@ -43,7 +43,7 @@ ENTRY(Reset_Handler)
 
 SECTIONS
 {
-    .data : ALIGN(4)
+    .data : ALIGN(8)
     {
         . = ALIGN(4);
         PROVIDE(_textdata = LOADADDR(.data));
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Giovanni
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Re: STM32L4xx FLASH & memory align

Post by Giovanni »

Hi,

Those changes would increase the memory footprint of the compiled code and RAM usage.

Write alignment is not related to code alignment, the flash programmer should perform aligned writes regardless the code alignment.

That same code works with ST-Link, JLink and others, I believe it is a bug in that software.

Giovanni
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