SDC on F0.

[Giovanni]

There is something wrong with SPI configuration, clocks or pins.

Giovanni

[rew]

Update: SPI2 is not present in the device.....

[Giovanni]

That is a good reason... you should have got a compilation error, is the registry file correct?

Giovanni

[rew]

The compilation was thinking it was an "MD" device, while I have LD.

So using the physical 103 that I have is "out".
So now I moved to "porting" the SDC based demo to MMC_SPI and from 103 to 072. Current situation: It crashes on:

Code: Select all

259       RCC->CR |= RCC_CR_HSION;                  /* Make sure HSI is ON.         */
(gdb) step
Breakpoint 1, _unhandled_exception () at ../../../os/common/startup/ARMCMx/compilers/GCC/vectors.c:46

(in stm32_clock_init).

I'm now running on an STM32F072RB, just like on the nucleo64-072. So I copied over those board files....

[rew]

OK. I've now gotten it to run into "main.c". I've apparently hacked something "wrong", as MMCD1 is not initialized as it should have been.

It seems SDCD1 is defined "elsewhere" and initialized properly, but MMCD1 does not work the same... Suggestions?

[Giovanni]

Make sure that all configuration files and makefile come from a demo for F0, you could have mixed some of them with F1 files.

Said that, the driver has never been tested on F0 because lack of HW, there could be a problem somewhere.

Giovanni

[rew]

I removed the USB-serial code and went back to hardware serial.

Code: Select all

ChibiOS/RT hell
ch> this isa test. 

It still crashes with an unhandled exception:

Code: Select all

Breakpoint 5, _unhandled_exception () at ../../../os/common/startup/ARMCMx/compilers/GCC/vectors.c:46
46      void _unhandled_exception(void) {
(gdb) where
#0  _unhandled_exception () at ../../../os/common/startup/ARMCMx/compilers/GCC/vectors.c:46
#1  <signal handler called>
#2  0x55555554 in ?? ()
Backtrace stopped: previous frame identical to this frame (corrupt stack?)
(gdb) 

[Giovanni]

It is possible you are hitting a stack overflow somewhere. Are debug options enabled in chconf.h?

Giovanni

[rew]

Many DEBUG options were OFF. Working on it to get them enabled.

Here is a patch that adds a few lines to some readme's that would have saved me some time....
http://prive.bitwizard.nl/readme.fixes.patch

(when it doesn't compile I look for instructions in "COMPILING" and if that is absent, a readme.... In this case we have a readme, and it even has a "compiling" section. )

[rew]

OK. I started from scratch.

I took the F0 CDC demo, then copied the parts I though relevant from the fatfs demo on 103 into my source.

I'm seeing about 125 clocks with CS high, then 136 clocks (17 bytes) with CS low, followed by a single byte (8 clocks) every 1ms.

MOSI goes high before the first clock. MISO does not show any activity.

All this activity happens about 10 seconds after starting the CPU. I think that's because I increased the polling interval and delay to 100. (I thought the timer was starving the USB process at one point in time..)

Is this expected? (Feel free to assume that my SD card is dead or wrongly connected... )