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Re: Bare metal I2C breaks ChibiOS i2cMasterTransmit

Posted: Thu Mar 08, 2012 4:32 pm
by Giovanni
There is an article about shutting down ChibiOS and restarting it, did you check it out?

Giovanni

Re: Bare metal I2C breaks ChibiOS i2cMasterTransmit

Posted: Fri Mar 09, 2012 2:13 pm
by matis
Giovanni wrote:There is an article about shutting down ChibiOS and restarting it, did you check it out?

Giovanni

Giovanni,

no I was not aware of that. I've looked it through, but I can't find a decent way to stop the system timer. When I jump from user_app to boot_app, the bare metal "TIM2_IRQHandler" (in the boot_app) isn't triggered at all.
I've already re-initialized the vector tables

Code: Select all

  NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0000);
  NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0000); 

That doesn't make a difference :(

Re: Bare metal I2C breaks ChibiOS i2cMasterTransmit

Posted: Fri Mar 09, 2012 2:23 pm
by Giovanni
It doesn't because ChibiOS initializes the vector table address himself when chSysInit() is invoked, so configure that in ChibiOS, it is an option of the port layer.

Giovanni

Re: Bare metal I2C breaks ChibiOS i2cMasterTransmit

Posted: Fri Mar 09, 2012 2:42 pm
by matis
Giovanni wrote:It doesn't because ChibiOS initializes the vector table address himself when chSysInit() is invoked, so configure that in ChibiOS, it is an option of the port layer.

Giovanni

Giovanni,

It is not ChibiOS that I mentioned, but the bare metal bootloader. In ChibiOS I set location of the VTOR through the CORTEX_VTOR_INIT define in chconf.h.
When I jump from boot_app to user_app, everything works fine. The whole system is reseted and all the interrupts are fine, but when I jump back from user_app to boot_app, the timer interrupt doesn't get fired.

I think that the ChibiOS chSysDisable() disables the interrupts in such a way, that the current boot_app isn't able to restore those disabled ports.

Re: Bare metal I2C breaks ChibiOS i2cMasterTransmit

Posted: Fri Mar 09, 2012 9:50 pm
by Giovanni
chSysDisable() performs a "cpsid i" instruction, in order to re-enable interrupts you have to execute a "cpsie i".

This sequence enables interrupts for sure regardless the previous status:

Code: Select all

    movs    r3, #0
    msr     BASEPRI, r3                   
    cpsie   i


You also need to make sure that the NVIC status is correct before switching or you may have some interrupt sources enabled after the switch.

Giovanni