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Re: Memory-mapped flash on F7 and H7
Posted: Sat Feb 20, 2021 8:36 pm
by Giovanni
I took it from the F7 code.
Code: Select all
RCC_AHB3ENR_QSPIEN | RCC_AHB3RSTR_QSPIRST
Note that you are mixing constants of 2 different registers here.
Giovanni
Re: Memory-mapped flash on F7 and H7
Posted: Sat Feb 20, 2021 10:00 pm
by andypiper
Giovanni wrote:I took it from the F7 code.
Code: Select all
RCC_AHB3ENR_QSPIEN | RCC_AHB3RSTR_QSPIRST
Note that you are mixing constants of 2 different registers here.
Giovanni
I wondered about that, but isn't this the same?
Code: Select all
rccResetAHB4(~(RCC_APB4RSTR_SYSCFGRST | STM32_GPIO_EN_MASK));
?
Re: Memory-mapped flash on F7 and H7
Posted: Sat Feb 20, 2021 10:29 pm
by Giovanni
andypiper wrote:Code: Select all
rccResetAHB4(~(RCC_APB4RSTR_SYSCFGRST | STM32_GPIO_EN_MASK));
?
STM32_GPIO_EN_MASK is used for both enabling and resetting, it relies on registers having bits in same position. If you use ST header definitions then better use the correct ones.
Giovanni
Re: Memory-mapped flash on F7 and H7
Posted: Sun May 16, 2021 4:31 pm
by andypiper
I've started on this again, but using a Nucleo H743 board with a breakout so that I can debug. The flash chip I want to support is W25Q128JV is this the same chip as supported by the N25Q serial nor driver? Or do I have to write my own?
The reason I ask is the driver hangs in snorStart() for me.
Re: Memory-mapped flash on F7 and H7
Posted: Sun May 16, 2021 4:53 pm
by Giovanni
Hi,
It is different, a new mini-driver is required.
Giovanni
Re: Memory-mapped flash on F7 and H7
Posted: Tue May 18, 2021 8:06 am
by andypiper
Giovanni wrote:Hi,
It is different, a new mini-driver is required.
Giovanni
Hi so I have written the mini driver. Now I see that I am missing the wiring of the QUADSPI pin functions into the driver. I am struggling to find an example of how to set this up, can you point me at it? I would have thought it would go in here
[font=Courier New]const WSPIConfig WSPIcfg1 = {
.end_cb = NULL,
.error_cb = NULL,
.dcr = STM32_DCR_FSIZE(24U) | /* 16MB device. */
STM32_DCR_CSHT(1U) /* NCS 2 cycles delay. */
};[/font]
but doesn't seem to be
Thanks
andy
Re: Memory-mapped flash on F7 and H7
Posted: Tue May 18, 2021 9:06 am
by Giovanni
Sorry, I don't understand your question.
Giovanni
Re: Memory-mapped flash on F7 and H7
Posted: Tue May 18, 2021 9:53 am
by andypiper
Giovanni wrote:Sorry, I don't understand your question.
Giovanni
On the H7 there are certain pins that can be mapped to QUADSPI - how do I specify which pins those are to the wspi driver? There are at least two possibilities on H7
Re: Memory-mapped flash on F7 and H7
Posted: Tue May 18, 2021 1:07 pm
by steved
Your driver talks to the WSPI peripheral, which is a fixed entity (OK, maybe there are two, as with serial ports, but same principle).
The board setup file then links the required pins with the WSPI peripheral.
Re: Memory-mapped flash on F7 and H7
Posted: Tue May 18, 2021 1:14 pm
by andypiper
steved wrote:Your driver talks to the WSPI peripheral, which is a fixed entity (OK, maybe there are two, as with serial ports, but same principle).
The board setup file then links the required pins with the WSPI peripheral.
Its the board setup file I am missing in this case - can you point me at an example?