Hey guys,
I'm using STM32F30x. In mcuconf.c files of some examples which are provided in testhall folder, I realized that just ADC1 and ADC3 have been enabled as following configuration:
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_USE_ADC3 TRUE
As I know this kind of STM32F30x has four ADC main ports. I want to know if it's possible to use ADC2 and ADC4 as well.
Thank you.
STM32F4 ADC configuration
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- Giovanni
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Re: STM32F4 ADC configuration
Hi,
ADC2 and ADC4 currently can only be used in "dual mode" but not alone.
It would be possible to modify the driver to allow the use in single mode but it would be not so immediate because ADC1 and ADC2 share a clock enable, ADC3 and ADC4 share another one. Enabling one unit means necessarily enabling the other one that would make handling clocks a bit messy.
Do you need 4 independent ADCs?
Giovanni
ADC2 and ADC4 currently can only be used in "dual mode" but not alone.
It would be possible to modify the driver to allow the use in single mode but it would be not so immediate because ADC1 and ADC2 share a clock enable, ADC3 and ADC4 share another one. Enabling one unit means necessarily enabling the other one that would make handling clocks a bit messy.
Do you need 4 independent ADCs?
Giovanni
Re: STM32F4 ADC configuration
Thanks Giovanni for your reply. Actually I was curious to find out why there is no sign of other ADCs in mcuconf.h
To be honest I have just started using your valuable RTOS and I'm very grateful for that.
I'm working on ADC example right now. So would you please tell me about samples array? As I noticed, this is a one dimension array with the length of # of channel * Buffer Depth. Is that correct? and if it's correct so, would you tell me how exactly this array will fill by ADC converting.
Thank you again,
I'm working on ADC example right now. So would you please tell me about samples array? As I noticed, this is a one dimension array with the length of # of channel * Buffer Depth. Is that correct? and if it's correct so, would you tell me how exactly this array will fill by ADC converting.
Thank you again,
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Re: STM32F4 ADC configuration
Hi,
Samples are an M*N matrix, where M is the number of channels defined in a conversion group structure, N is the number of times the conversion is performed (the parameter to adcConvert()).
See the demo application under ./testhal, an example of matrix is shown there.
The most simple case is when the group contains a single channel and you convert it only once M=1,N=1, just one sample.
Giovanni
Samples are an M*N matrix, where M is the number of channels defined in a conversion group structure, N is the number of times the conversion is performed (the parameter to adcConvert()).
See the demo application under ./testhal, an example of matrix is shown there.
The most simple case is when the group contains a single channel and you convert it only once M=1,N=1, just one sample.
Giovanni
Re: STM32F4 ADC configuration
Hi Giovanni,
You mentioned that samples are M * N Matrix.
So if I want to have access to the arrays of this matrix, I should recall them by using "samples1[m] [n]"?
You mentioned that samples are M * N Matrix.
So if I want to have access to the arrays of this matrix, I should recall them by using "samples1[m] [n]"?
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Re: STM32F4 ADC configuration
It depends on how you declared "samples1", you could access it both as an array or as a matrix.
In HAL demos it is an array with one M*N dimension.
Giovanni
In HAL demos it is an array with one M*N dimension.
Giovanni
Re: STM32F4 ADC configuration
Just one more question
Before going further in programming I want to know how ADC conversation would fill "sample1" array. I thought in the way shown below
, is this correct?
Thanks,
Thanks,
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Re: STM32F4 ADC configuration
Nope, one row contains all channels belonging to a group. The driver writes channels sequentially in memory.
Giovanni
Giovanni
Re: STM32F4 ADC configuration
Hi Mr.Giovanni,
It seems that I didn't get your point, unfortunately I'm a little confused
As you said before, we can deal with buffer memory as an array with M*N dimension. So would you please tell me that is the following illustration exactly shows how the driver writes channels in memory?
Thanks,
It seems that I didn't get your point, unfortunately I'm a little confused
As you said before, we can deal with buffer memory as an array with M*N dimension. So would you please tell me that is the following illustration exactly shows how the driver writes channels in memory?
Thanks,
Giovanni wrote:Nope, one row contains all channels belonging to a group. The driver writes channels sequentially in memory.
Giovanni
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