Tabulous wrote:F030x4, F030x6, F030x8 are all the same they all have fixed /2 and dont have a PREDIV divisor
Where as the F030xC does not have the fixed /2, it has a PREDIV divisor and a PLLMUL.
So fro this here is a list of devices and where they sit
All these have fixed /2
STM32F030x4
STM32F030x6
STM32F030x8
STM32F03x
STM32F05x
All these dont have it
STM32F04x
STM32F07x
STM32F09x
STM32F070x6
STM32F070xB
STM32F030xC
Code: Select all
#define STM32_NO_INIT FALSE
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_HSI_ENABLED TRUE
#define STM32_HSI14_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
#define STM32_LSE_ENABLED FALSE
#define STM32_SW STM32_SW_PLL
#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
#define STM32_PREDIV_VALUE 1
#define STM32_PLLMUL_VALUE 12
#define STM32_HPRE STM32_HPRE_DIV1
#define STM32_PPRE STM32_PPRE_DIV1
#define STM32_ADCSW STM32_ADCSW_HSI14
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
#define STM32_ADCPRE STM32_ADCPRE_DIV4
//#define STM32_ADCSW STM32_ADCSW_HSI14
#define STM32_CECSW STM32_CECSW_HSI
#define STM32_I2C1SW STM32_I2C1SW_HSI
#define STM32_USART1SW STM32_USART1SW_PCLK
#define STM32_RTCSEL STM32_RTCSEL_LSI
Code: Select all
/* PLL activation.*/
RCC->CR |= RCC_CR_PLLON;
Giovanni wrote:Hi,
Try putting a breakpoint before the clock initialization then proceed from there. Are there boards for those small devices? without hands on it is hard to find problems.
Giovanni
Code: Select all
/* PLL activation.*/
RCC->CR |= RCC_CR_PLLON;
Giovanni wrote:It looks like a clock out of spec, probably casue by that divider. I will review, again, the code vs the clock tree...
Because those variants, probably the solution is to have two separate implementations of the clock tree, with and without divider.
Giovanni
