Re: Bootloader topic
Posted: Thu May 21, 2015 7:58 am
The Cortex-M0 does not have a VTOR register.
Giovanni
Giovanni
Code: Select all
/* Relocate by software the vector table to the internal SRAM at 0x20000000 ***/
/* Copy the vector table from the Flash (mapped at the base of the application
load address 0x08003000) to the base address of the SRAM at 0x20000000. */
for(i = 0; i < 48; i++)
{
VectorTable[i] = *(__IO uint32_t*)(APPLICATION_ADDRESS + (i<<2));
}
/* Enable the SYSCFG peripheral clock*/
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
/* Remap SRAM at 0x00000000 */
SYSCFG_MemoryRemapConfig(SYSCFG_MemoryRemap_SRAM);
The user application to be loaded into the Flash memory using IAP should be built with the
following configuration settings:
1. Set the program load address at 0x08003000, using the toolchain linker file.
2. Relocate the vector table at address 0x20000000 (reserve 48 word starting in RAM @
0x20000000 ).
Bits 1:0 MEM_MODE[1:0]: Memory mapping selection bits
These bits are set and cleared by software. They control the memory internal mapping at
address 0x0000 0000. After reset these bits take on the value selected by the actual boot
mode configuration. Refer to Chapter 2.5: Boot configuration for more details.
x0: Main Flash memory mapped at 0x0000 0000
01: System Flash memory mapped at 0x0000 0000
11: Embedded SRAM mapped at 0x0000 0000