ChibiOS Free Embedded RTOS

alex31 wrote:Hello,

I made some modifications on BxCAN/FdCAN drivers to :

* add :

° filtering to FdCANv1, v2 : both native and BxCAN compatible API
° filtering API that can be called after CANStart to BxCAN
° possibility to send FDCan frames to FDCANv1 (was there in V2)

* fix :
registry file (same patch as was already submited)

Here is the cumulative patch.
Alexandre

• it actually supports more interrupts then RX-FIFO-FULL when receiving frames: there is RX-FIFO-WATERMARK and RX-FIFO-NEWMESSAGE (see RM0455, 2457/2966, FDCAN_IE bit 0, 1, 4 and 5). the testhal CAN code works properly, as it generates a lot of CAN frames (fifo fills rapidly). but if you need to react instantly to a single frame, you are out of luck with the current implementation, i guess. it would be nice to be able to configure the watermark via [font=monospace]CANConfig[/font].
• setting the FIFO size to 1 frame may be a possible solution also to react instantly (and use the already implemented RX-FIFO-FULL interrupt). unfortunately, the current implementation does not support setting the fifo size (ie via [font=monospace]CANConfig[/font]) - see below for some example code to set the fifo size.
• i am quite unsure, if [font=monospace]CAN_MAILBOX_TO_MASK()[/font] and [font=monospace]canmbx_t[/font] is used properly everywhere. it seems to me, that it is used as a bitfield in some places and as number in some other places. it does not matter, so far, as there is only 1 TX FIFO and only 2 RX FIFOs. 1 = 1 and 2 = 2, no matter, if bitfield or number, as 0 is used for [font=monospace]CAN_ANY_MAILBOX[/font].

CAND1.fdcan->CCCR  |= FDCAN_CCCR_INIT_Msk;
while (!(CAND1.fdcan->CCCR & FDCAN_CCCR_INIT_Msk));   /* need to wait, due to different clock domains */
CAND1.fdcan->CCCR  |= FDCAN_CCCR_CCE_Msk;   /* can only be set, if INIT is set. enables write from CPU. */
CAND1.fdcan->RXF0C &= ~FDCAN_RXF0C_F0S_Msk;
CAND1.fdcan->RXF0C |= (1 << FDCAN_RXF0C_F0S_Pos) & FDCAN_RXF0C_F0S_Msk;
CAND1.fdcan->RXF1C &= ~FDCAN_RXF1C_F1S_Msk;
CAND1.fdcan->RXF1C |= (1 << FDCAN_RXF1C_F1S_Pos) & FDCAN_RXF1C_F1S_Msk;
CAND1.fdcan->CCCR  &= ~FDCAN_CCCR_INIT_Msk;   /* also clears CCE. */

nikiwaibel wrote:i may add my 5cent for FDCANv2 on STM32H7A3 …

• it actually supports more interrupts then RX-FIFO-FULL when receiving frames: there is RX-FIFO-WATERMARK and RX-FIFO-NEWMESSAGE (see RM0455, 2457/2966, FDCAN_IE bit 0, 1, 4 and 5). the testhal CAN code works properly, as it generates a lot of CAN frames (fifo fills rapidly). but if you need to react instantly to a single frame, you are out of luck with the current implementation, i guess. it would be nice to be able to configure the watermark via [font=monospace]CANConfig[/font].
• setting the FIFO size to 1 frame may be a possible solution also to react instantly (and use the already implemented RX-FIFO-FULL interrupt). unfortunately, the current implementation does not support setting the fifo size (ie via [font=monospace]CANConfig[/font]) - see below for some example code to set the fifo size.
• i am quite unsure, if [font=monospace]CAN_MAILBOX_TO_MASK()[/font] and [font=monospace]canmbx_t[/font] is used properly everywhere. it seems to me, that it is used as a bitfield in some places and as number in some other places. it does not matter, so far, as there is only 1 TX FIFO and only 2 RX FIFOs. 1 = 1 and 2 = 2, no matter, if bitfield or number, as 0 is used for [font=monospace]CAN_ANY_MAILBOX[/font].

(the things mentioned may apply to FDCANv1 also).

setting the FIFO size to 1 frame for both RX FIFOs:

Code: Select all

CAND1.fdcan->CCCR  |= FDCAN_CCCR_INIT_Msk;
while (!(CAND1.fdcan->CCCR & FDCAN_CCCR_INIT_Msk));   /* need to wait, due to different clock domains */
CAND1.fdcan->CCCR  |= FDCAN_CCCR_CCE_Msk;   /* can only be set, if INIT is set. enables write from CPU. */
CAND1.fdcan->RXF0C &= ~FDCAN_RXF0C_F0S_Msk;
CAND1.fdcan->RXF0C |= (1 << FDCAN_RXF0C_F0S_Pos) & FDCAN_RXF0C_F0S_Msk;
CAND1.fdcan->RXF1C &= ~FDCAN_RXF1C_F1S_Msk;
CAND1.fdcan->RXF1C |= (1 << FDCAN_RXF1C_F1S_Pos) & FDCAN_RXF1C_F1S_Msk;
CAND1.fdcan->CCCR  &= ~FDCAN_CCCR_INIT_Msk;   /* also clears CCE. */