FXCoder wrote:Alex,
The BRR assert is a minor pending fix to be applied.
viewtopic.php?f=35&t=5378
--
Bob
Giovanni wrote:STM32G473 is not defined in registry, I don't have one to test. You could add it and give feedback about it.
Giovanni
Giovanni wrote:ADCv3 is now functional and there is a demo. FDCAN should be next.
Is anybody able to test the USB driver on G4?
Giovanni
julester23 wrote:I made some improvements to the FDCAN driver to handle multiple peripherals and was able to test it on the EVAL board. Latest branch includes the older work and also the newer here: https://github.com/julienrhodes/ChibiOS ... n_g474eval
Code: Select all
/* CAN attributes.*/
#define STM32_HAS_FDCAN1 TRUE
#define STM32_HAS_FDCAN2 TRUE
#define STM32_FDCAN_FLS_NBR 128U
#define STM32_FDCAN_FLE_NBR 128U
#define STM32_FDCAN_RF0_NBR 64U
#define STM32_FDCAN_RF1_NBR 64U
#define STM32_FDCAN_RB_NBR 64U
#define STM32_FDCAN_TEF_NBR 32U
#define STM32_FDCAN_TB_NBR 32U
#define STM32_FDCAN_TM_NBR 64U
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/*
* IRQ system settings.
*/
#define STM32_IRQ_FDCAN1_PRIORITY 10
#define STM32_IRQ_FDCAN2_PRIORITY 10
/*
* CAN driver system settings.
*/
#define STM32_CAN_USE_FDCAN1 TRUE
#define STM32_CAN_USE_FDCAN2 FALSE
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static bool fdcan_clock_stop(CANDriver *canp) {
systime_t start, end;
/* Requesting clock stop then waiting for it to happen.*/
canp->fdcan->CCCR |= FDCAN_CCCR_CSR;
start = osalOsGetSystemTimeX();
end = osalTimeAddX(start, TIME_MS2I(TIMEOUT_INIT_MS));
while ((canp->fdcan->CCCR & FDCAN_CCCR_CSA) != 0U) {
if (!osalTimeIsInRangeX(osalOsGetSystemTimeX(), start, end)) {
return true;
}
osalThreadSleepS(1);
}
return false;
}
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canp->fdcan->TXBAR = ((uint32_t)1 << mailbox);Code: Select all
typedef struct {
/**
* @brief Frame header.
*/
union {
struct {
union {
uint32_t EID:29; /**< @brief Extended Identifier. */
struct {
uint32_t _R1:18;
uint32_t SID:11; /**< @brief Standard identifier. */
uint32_t RTR:1; /**< @brief Remote transmit request.*/
uint32_t XTD:1; /**< @brief Extended identifier. */
uint32_t ESI:1; /**< @brief Error state indicator. */
};
};
uint16_t RXTS:16; /**< @brief TX time stamp. */
uint8_t DLC:4; /**< @brief Data length code. */
uint8_t BRS:1; /**< @brief Bit rate switch. */
uint8_t FDF:1; /**< @brief FDCAN frame format. */
uint8_t _R2:2;
uint8_t FIDX:7; /**< @brief Filter index. */
uint8_t ANMF:1; /**< @brief Accepted non-matching
frame. */
};
uint32_t header32[2];
};
/**
* @brief Frame data.
*/
union {
uint8_t data8[CAN_MAX_DLC_BYTES];
uint16_t data16[CAN_MAX_DLC_BYTES / 2];
uint32_t data32[CAN_MAX_DLC_BYTES / 4];
};
} CANRxFrame;Code: Select all
static bool fdcan_clock_stop(CANDriver *canp) {
systime_t start, end;
/* Requesting clock stop then waiting for it to happen.*/
canp->fdcan->CCCR &= ~FDCAN_CCCR_CSR;
start = osalOsGetSystemTimeX();
end = osalTimeAddX(start, TIME_MS2I(1000));
while ((canp->fdcan->CCCR & FDCAN_CCCR_CSA) == FDCAN_CCCR_CSA) {
if (!osalTimeIsInRangeX(osalOsGetSystemTimeX(), start, end)) {
return true;
}
osalThreadSleepS(1);
}
return false;
}