ChibiOS Free Embedded RTOS

Posted: **Sat Aug 09, 2014 11:17 am**

Hi all,

i want to use adc hal in dual mode triggered by timer 1 ccr4. The timer feeds the pulses over TRGO and TRGO2 signals.

my ADCs 1_2 and 3_4 should both trigger on this signal. On both adcs i use 4 channels 2 for each HW ADC, and 8 Smaples / i also tried 32 samples.
But my application runs endless ly through the DMA ISR. any one an idea what is set up wrong?

ADC Config

Code: Select all

 _adcConvGrp1_2({
      TRUE,                                                        /* circular mode */
      U8_NBR_OF_CHANNELS,
      NULL,
      NULL,
      /*
       * external trigger from TRGO2 of TIM1 on rising edge
       *
       */
      ADC_CFGR_EXTSEL_SRC(10) | ADC_CFGR_EXTEN_RISING,              /* CFGR     */
      ADC_TR(0, 4095),                                              /* TR1      */
      ADC_CCR_DUAL(1),                                              /* CCR      */
      {                                                             /* SMPR[2]  */
            /*
             * 20 ADC Cycles Conversion time with 7.5 clocks sample time to get a litle
             * extra filtering, OPAMP1 as Input
             */
            ADC_SMPR1_SMP_AN2(ADC_SMPR_SMP_7P5),
            0
      },
      {     /* Current Phase A */                                   /* SQR[4]   */
            ADC_SQR1_SQ1_N(ADC_CHANNEL_IN2)| ADC_SQR1_SQ2_N(ADC_CHANNEL_IN2),
            0,
            0,
            0
      },
      /*
       * 20 ADC Cycles Conversion time with 7.5 clocks sample time to get a litle
       * extra filtering, OPAMP2 as Input
       */
      {                                                             /* SSMPR[2] */
            ADC_SMPR1_SMP_AN7(ADC_SMPR_SMP_7P5),
            0
      },
      {     /* DC Bus Voltage */                                    /* SSQR[4]  */
            ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN7),
            0,
            0,
            0
      }

   }),
   _adcConvGrp3_4({
      TRUE,                                                        /* circular mode */
      U8_NBR_OF_CHANNELS,
      NULL,
      NULL,
      /*
       * external trigger from TRGO2 of TIM1 on rising edge
       *
       */
      ADC_CFGR_EXTSEL_SRC(10) | ADC_CFGR_EXTEN_RISING,              /* CFGR     */
      ADC_TR(0, 4095),                                              /* TR1      */
      ADC_CCR_DUAL(1),                                              /* CCR      */
      {                                                             /* SMPR[2]  */
            /*
             * 20 ADC Cycles Conversion time with 7.5 clocks sample time to get a litle
             * extra filtering, OPAMP1 as Input
             */
            0,
            ADC_SMPR2_SMP_AN12(ADC_SMPR_SMP_7P5)
      },
      {     /* Current Phase C */                                   /* SQR[4]   */
            ADC_SQR1_SQ1_N(ADC_CHANNEL_IN12) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN12),
            0,
            0,
            0
      },
      /*
       * 20 ADC Cycles Conversion time with 7.5 clocks sample time to get a litle
       * extra filtering, OPAMP2 as Input
       */
      {                                                             /* SSMPR[2] */
            ADC_SMPR1_SMP_AN3(ADC_SMPR_SMP_7P5),
            0
      },
      {     /* External Setpoint */                                 /* SSQR[4]  */
            ADC_SQR1_SQ1_N(ADC_CHANNEL_IN3) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN3),
            0,
            0,
            0
      }

   })

start code for adc

Code: Select all

   /*
    * Activates the ADC1 driver and the temperature sensor.
    */
   adcStart(&ADCD1, NULL);
   adcStart(&ADCD3, NULL);

   /*
    * Starts an ADC continuous conversion.
    */
   adcStartConversion(&ADCD1, &_adcConvGrp1_2, (adcsample_t*)_samples1_2, U8_SAMPLES_PER_CHANNEL);
   adcStartConversion(&ADCD3, &_adcConvGrp3_4, (adcsample_t*)_samples3_4, U8_SAMPLES_PER_CHANNEL);

Greetings

Tec

Posted: **Sat Aug 09, 2014 12:48 pm**

Hi,

Not sure really, verify if edge triggering and frequencies are what you expect. erify also if the driver works as expected with those settings in SW triggering mode.

Giovanni

Posted: **Sat Aug 09, 2014 1:41 pm**

Hi Giovanni,

when i disable the ext trigger, the circular mode and smaple with adcConvert. the results are good. but with the triggering i get the issues.
So i think my configuration of the channels and their sampling is right. the buffer size seem to be correct also.

i lowered the PWM frequency to 5 MHz. The MMS and MMS2 bits of timer 1 are set to 7 meaning CCR4 ist TRGO and TRGO2 output. it make no matter on which trigger the adc runs. als long as i dont enale circular mode. Even when i disable extrigger to the adc. with CFGR = 0 n config, it permanetly runs in the isr of the first started adc. the second one wil not even start. when the sampling and ints are enabled the cpu sems to be permanently in interrupt context.

Ich checked also the addresse of the DMA, to me it sems the Int flags are not being reset. But the interrupt will also run when in sw triger mode so this could not be.

WTF. I also placed the Hall completly in Flash. before it was running from ram. because i thougt it might be some execution time problem. The Memory addres the DMA is working on is valid and in RAM not placed in CCRAM. THeir i only have Control Algorithms.

Regards

Tec

Posted: **Sat Aug 09, 2014 1:49 pm**

I am away from home for 2 weeks, cannot do any test right now.

Could it be that the ISR fails to reset some flag in HW mode?

Giovanni

Posted: **Sat Aug 09, 2014 2:06 pm**

Ok i will try to make a test with the testhal adc_Dual mode on the discovery board.

Posted: **Tue Aug 12, 2014 11:40 am**

Hi All,

I tested the testhal stm32f30x ADC_DUAL program, which works correctly. So i think its a problem with the other hal components i use. when i have the time i will disable all and test adc in my app stand alone, my be i find the problem by this.

Regards

Tec

Posted: **Mon Aug 18, 2014 3:40 pm**

Hi,

I was experiencing similar (and non-deterministic) problems using the ADC on F3 devices:
1) DMA interrupt handlers continuously invoked, even before calling adcStart()
2) the assert at the beginning of adc_lld_calibrate() fails
3) unhandled exceptions

I've found that the mcu was actually starting with non-reset values in some ADC registers (e.g., the IER register was not set to 0, and this explains why DMA interrupts were triggered even before calling adcStart() ), and forcing IER in adc_lld_init() solved the interrupts problem. The same applies to adc_lld_calibrate(): forcing the CR register to 0 solves the problem.

Finally, I did notice that in hal_lld_init() peripherals on the APB1 and APB2 are resetted, but not those connected to AHB:

Code: Select all

void hal_lld_init(void) {
  /* Reset of all peripherals.*/
  rccResetAPB1(0xFFFFFFFF);
  rccResetAPB2(0xFFFFFFFF);

simply adding a reset of AHB peripherals solved issues 1) and 2):

Code: Select all

void hal_lld_init(void) {
  /* Reset of all peripherals.*/
  rccResetAPB1(0xFFFFFFFF);
  rccResetAPB2(0xFFFFFFFF);
  rccResetAHB(0xFFFFFFFF);

Notice that this problem may show even on other platforms, which have less peripherals connected to the AHB bus, but still some (e.g., the MAC controller).

I'm still experiencing some non-deterministic unhandled exceptions occasionally, which also cause a corruption in the threads list; actually I did experienced even with STM32F1xx microcontrollers, but I was never be able to solve this issue.

Posted: **Mon Aug 18, 2014 4:15 pm**

I will look into the driver initialization, threads list corruption is likely caused by a random overflow, thread structures are placed at bottom of working areas.

Registers not containing reset values could be caused by the debugger because it stops a running program.

Giovanni

Posted: **Mon Aug 18, 2014 4:58 pm**

H tinito,

i thought about reset values to. i added the reset of AHB and the reset of IER and CR registers. but this does not solve my problem. but it has also no negative effect on the ADC operation for now, i "solve" the problem with this lines:

Code: Select all

   /*
    * Starts an ADC continuous conversion.
    */
   adcStartConversion(&ADCD1, &adcConvGrp1_2, (adcsample_t*)samples1_2, U8_SAMPLES_PER_CHANNEL);
   ADCD1.dmastp->channel->CCR &= ~(STM32_DMA_CR_TCIE | STM32_DMA_CR_HTIE);
   adcStartConversion(&ADCD3, &adcConvGrp3_4, (adcsample_t*)samples3_4, U8_SAMPLES_PER_CHANNEL);
   ADCD3.dmastp->channel->CCR &= ~(STM32_DMA_CR_TCIE | STM32_DMA_CR_HTIE);

@tinito: maybe i missed some regs? Do u have a working adc_lld.c, My Adc register config seems to be correct when the int triggers but it does not solve my problem. maybe its runtime or an issue with the interruptvectors placed in RAM, until now even ST has no clue to this, and debug is really hard, cause u do not know if the DMA is Triggered when u are halting the cpu.

For a test i set up my triggering timer to 1kHz and set the Stop Timer1 bit in debug (Dont know the name yet), in the debug registers. (PWM stops when i am on a breakpoint.) Here it also seems he flags could not be reset. When i look at the DUAL ADC testhal projekt it runs freely with no issues, and there i can step over the Flag resetting instruction and see the flags getting reset. To me it seems its a cpu bug, but ST claims the F3 are proven for Defence so no Errors kown.

Regards

Tec

Posted: **Mon Aug 18, 2014 5:31 pm**

I doubt disabling those interrupts is a solution, the cause of the problem is not yet known.

Giovanni

ChibiOS Free Embedded RTOS

[DONE][STM32F30x] ADC configuration

[DONE][STM32F30x] ADC configuration

Re: [STM32F30x] ADC configuration

Re: [STM32F30x] ADC configuration

Re: [STM32F30x] ADC configuration

Re: [STM32F30x] ADC configuration

Re: [STM32F30x] ADC configuration

Re: [STM32F30x] ADC configuration

Re: [STM32F30x] ADC configuration

Re: [STM32F30x] ADC configuration

Re: [TODO][STM32F30x] ADC configuration