Porting 3.0 to Microblaze
Posted: Sat Sep 27, 2014 2:31 pm
Hi, I have a couple of FPGA projects that involves the Microblaze soft core from Xilinx. I really need a RTOS for these cores, and I don't like the available options. Chibios on the other hand, is the perfect choice for me. If I were to port Chibios to a new platform, I guess the best choice would be to start with the 3.0 version, even if it isn't released yet. I haven't seen any references to anyone trying to do such a port, but I guess there shouldn't be any technical issues as the Microblaze core is very similar to most modern 32 bit controllers.
There are a couple of unique issues that must be handled.
1. The MB core is very configurable. The are some 70 options for customizing the core. From the simplest minimalistic controller to a Linux capable system. FPU or not, you choose.
2. The peripherals are also fully configurable. You can add one timer and a 4 bit GPIO port, or you can add 20 UARTS and 12 SPI ports. You just pick what you need.
3. The memory system is flexible with quite much on chip memory available, but you can also add memory controllers for DDR ram, static ram, NAND flash and so on.
The point is that it may be difficult to span all the options. The solution would then be to start with a specific configuration to the the kernel up and running, and then build on that. The Xilinx tools generates XML files for each specific configuration which may be used as input to scripts that adapts the Chibios configs. But that is not the first priority.
The last thing, and the biggest problem, is that I am not that confident on my own programming skills for this kind of task. Is there anyone else that would like to team up and try this.
Now I'm off for dinner. More info to come.
Cheers,
Kjell
There are a couple of unique issues that must be handled.
1. The MB core is very configurable. The are some 70 options for customizing the core. From the simplest minimalistic controller to a Linux capable system. FPU or not, you choose.
2. The peripherals are also fully configurable. You can add one timer and a 4 bit GPIO port, or you can add 20 UARTS and 12 SPI ports. You just pick what you need.
3. The memory system is flexible with quite much on chip memory available, but you can also add memory controllers for DDR ram, static ram, NAND flash and so on.
The point is that it may be difficult to span all the options. The solution would then be to start with a specific configuration to the the kernel up and running, and then build on that. The Xilinx tools generates XML files for each specific configuration which may be used as input to scripts that adapts the Chibios configs. But that is not the first priority.
The last thing, and the biggest problem, is that I am not that confident on my own programming skills for this kind of task. Is there anyone else that would like to team up and try this.
Now I'm off for dinner. More info to come.
Cheers,
Kjell