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Chibios and Low Power

Posted: Thu Jan 08, 2015 9:35 am
by Tabulous
MCU is STM32F4xx
AT the moment i'm trying to reduce the current consumed by the MCU in stop mode.

Currently im down at 5.2mA, but this is still higher than it should be. This is with all I/O set to Analogue I/P, All GPIO CLKS Disabled.

In the STM datasheets it states peripherals if enable will consume current, so i disabled to start with ADC1(which i use in my application). This saved another 800uA.
All through it did high-light something.

To stop the ADC driver one can't just call adcStop( &ADCD1 ); you have to first call adcStopConversion( &ADCD1 );


The issue i have now is how should one safely stop Chibios Drivers, as each one of these will consume power in stop mode ? and some of them you cant just call xxxStop();
i.e.
SD
SDC
DMA
I2C
SPI

What i need effectively is the MCU back to the state like at the beginning of program execution before halinit(); is called.

Re: Chibios and Low Power

Posted: Thu Jan 08, 2015 10:43 am
by Giovanni
Stopping a driver requires waiting I/O operations to finish, the drivers state machine shows that, there is no way around that, it is up to the application to:
1) Stop doing I/O.
2) Stop drivers.

About pins, I am not sure that the best mode is analog, probably it is input with pullup.

Bringing the system to the pre-halInit() state requires switching the clock back to internal oscillator and the stop the PLLs, PLLs use a lot of current. This can be done with few writes into the RCC registers, an HAL-deinitialization is not part of the spec right now (but it would be not a bad idea actually).

Giovanni

Re: Chibios and Low Power

Posted: Thu Jan 08, 2015 10:52 am
by Tabulous
An hal deinit sounds like a very good thing, anyone wanting to achieve low current stop modes would be very interested in this.

Regards the I/O mode for best power consumption (from AN4365)

1.2.6 I/O configuration
By default, STM32F4 pins are configured as inputs, except some JTAG pins which can
impact the power consumption of the device in different power modes because pins are very
sensitive to external noise in input mode I/O.
To avoid extra I/O current, all pins should be configured as analog input (AIN); in this mode
the Schmitt trigger input is disabled, providing zero consumption for each I/O pin.
We recommend that the I/O speed frequency (driving level) be configured at the lowest
possible speed or as an output push-pull configuration, outputting 0 to the ODR. The user
should also disable the MCO pin of the clock output if not used.

Re: Chibios and Low Power

Posted: Sat Feb 25, 2017 12:03 pm
by rew
Old thread, I know.

Just FYI, Giovanni's suggestion also works, except when the pin has a "load-to-ground" on it. Then maybe input with pulldown is "cheaper" but this doesn't work either if the "load" pulls towards something in the middle. In short... The datasheet answer is the easiest way out.

Re: Chibios and Low Power

Posted: Sat Feb 25, 2017 12:10 pm
by Giovanni
About this, the latest STM32 (L4) has a new "detached" state which is meant to be optimal for unconnected/unused pins, probably none of the previous STM32s had a real optimal default setting if they implemented this in latest low power device.

The optimal state for older STM32s probably depends on how/if the pin is connected.

Giovanni